periph_cpu.h

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/*
 * SPDX-FileCopyrightText: 2022 Gunar Schorcht
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once
 
#include <stdbool.h>
#include <stdint.h>
#include "sdkconfig.h"
#include "hal/ledc_types.h"
#include "hal/spi_types.h"
#include "soc/ledc_struct.h"
#include "soc/periph_defs.h"
#include "soc/soc_caps.h"
 
#include "modules.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define STDIO_UART_DEV  CONFIG_ESP_CONSOLE_UART_NUM
 
#define PROVIDES_PM_SET_LOWEST
#define PROVIDES_PM_RESTART
#define PROVIDES_PM_OFF
#define PROVIDES_PM_LAYERED_OFF
 
#define PM_NUM_MODES            (3U)
 
#define ESP_PM_MODEM_SLEEP      (2U)
#define ESP_PM_LIGHT_SLEEP      (1U)
#define ESP_PM_DEEP_SLEEP       (0U)
#if defined(CPU_FAM_ESP32H2) && defined(CONFIG_IEEE802154_ENABLED)
/* ESP32H2 has IEEE802.15.4 radio which has an EUI64 address. Function
 * esp_efuse_mac_get_default will return this 8 byte address if
 * CONFIG_IEEE802154_ENABLED */
#  define CPUID_LEN             (8U)
#else
#  define CPUID_LEN             (6U)
#endif
 
#define HAVE_GPIO_T
typedef unsigned int gpio_t;
#define GPIO_UNDEF          (0xffffffff)
#define GPIO_PIN(x, y)      ((x << 5) | y)
#define PORT_GPIO           (0)
#define GPIO_PIN_NUMOF      (SOC_GPIO_PIN_COUNT)
#ifndef DOXYGEN
#define HAVE_GPIO_FLANK_T
typedef enum {
    GPIO_NONE,
    GPIO_RISING,    
    GPIO_FALLING,   
    GPIO_BOTH,      
    GPIO_LOW,       
    GPIO_HIGH       
} gpio_flank_t;
#define HAVE_GPIO_MODE_T
typedef enum {
    GPIO_IN,        
    GPIO_IN_PD,     
    GPIO_IN_PU,     
    GPIO_OUT,       
    GPIO_OD,        
    GPIO_OD_PU,     
    GPIO_IN_OUT,    
    GPIO_IN_OD,     
    GPIO_IN_OD_PU   
} gpio_mode_t;
/* BEGIN: GPIO LL overwrites */
 
#if SOC_GPIO_PIN_COUNT > 32
#  define GPIO_PORT_NUMOF           2
#  define GPIO_PORT_0               0
#  define GPIO_PORT_1               1
#  define GPIO_PORT_0_PIN_NUMOF     (32)
#  define GPIO_PORT_1_PIN_NUMOF     (SOC_GPIO_PIN_COUNT - 32)
#  define GPIO_PORT_PIN_NUMOF(p)    ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF \
                                                        : GPIO_PORT_1_PIN_NUMOF)
#else
#  define GPIO_PORT_NUMOF            1
#  define GPIO_PORT_0               0
#  define GPIO_PORT_0_PIN_NUMOF     (SOC_GPIO_PIN_COUNT)
#  define GPIO_PORT_PIN_NUMOF(p)    ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF : 0)
#endif
 
#define HAVE_GPIO_PORT_T
typedef uintptr_t gpio_port_t;
 
#define HAVE_GPIO_SLEW_T
typedef enum {
    GPIO_SLEW_SLOWEST = 0,
    GPIO_SLEW_SLOW = 0,
    GPIO_SLEW_FAST = 0,
    GPIO_SLEW_FASTEST = 0,
} gpio_slew_t;
 
#define HAVE_GPIO_PULL_STRENGTH_T
typedef enum {
    GPIO_PULL_WEAKEST = 0,
    GPIO_PULL_WEAK = 0,
    GPIO_PULL_STRONG = 0,
    GPIO_PULL_STRONGEST = 0
} gpio_pull_strength_t;
 
/*
 * This include is placed here by intention to avoid type name conflicts.
 * Having the macros HAVE_GPIO_* defined before including this file allows to
 * use these macros in `hal/gpio_types.h` to decide whether to use the
 * ESP-IDF types when compiling ESP-IDF modules or to use the RIOT types
 * when compiling RIOT source code.
 */
#include "hal/gpio_types.h"
 
#define HAVE_GPIO_PULL_T
typedef gpio_pull_mode_t gpio_pull_t;
#define GPIO_PULL_UP    GPIO_PULLUP_ONLY
#define GPIO_PULL_DOWN  GPIO_PULLDOWN_ONLY
#define GPIO_PULL_KEEP  GPIO_PULLUP_PULLDOWN
 
#define HAVE_GPIO_DRIVE_STRENGTH_T
typedef enum {
    GPIO_DRIVE_WEAKEST   = 0,    
    GPIO_DRIVE_WEAK      = 1,    
    GPIO_DRIVE_STRONG    = 2,    
    GPIO_DRIVE_STRONGEST = 3,    
} gpio_drive_strength_t;
 
/*
 * @brief   Map former enumeration values the new enumeration values for compatibility.
 */
#define GPIO_DRIVE_5    GPIO_DRIVE_WEAKEST      
#define GPIO_DRIVE_10   GPIO_DRIVE_WEAK         
#define GPIO_DRIVE_20   GPIO_DRIVE_STRONG       
#define GPIO_DRIVE_30   GPIO_DRIVE_STRONGEST    
#define HAVE_GPIO_STATE_T
typedef enum {
    GPIO_OUTPUT_PUSH_PULL,
    GPIO_OUTPUT_OPEN_DRAIN,
    GPIO_OUTPUT_OPEN_SOURCE,
    GPIO_INPUT,
    GPIO_USED_BY_PERIPHERAL,
    GPIO_DISCONNECT,
} gpio_state_t;
 
#define HAVE_GPIO_CONF_T
typedef union gpio_conf_esp32 gpio_conf_t;
 
#endif /* ndef DOXYGEN */
 
union gpio_conf_esp32 {
    uint8_t bits;  
    struct {
        gpio_state_t state                      : 3;
        gpio_pull_t pull                        : 2;
        gpio_drive_strength_t drive_strength    : 2;
        bool initial_value                      : 1;
    };
};
 
/* END: GPIO LL overwrites */
#define ADC_NUMOF_MAX   (SOC_ADC_CHANNEL_NUM(0) + SOC_ADC_CHANNEL_NUM(1))
 
#if defined(SOC_DAC_SUPPORTED) || DOXYGEN
#  define DAC_NUMOF_MAX (SOC_DAC_PERIPH_NUM)
#endif
 
#ifndef DOXYGEN
#define HAVE_I2C_SPEED_T
typedef enum {
    I2C_SPEED_LOW = 0,      
    I2C_SPEED_NORMAL,       
    I2C_SPEED_FAST,         
    I2C_SPEED_FAST_PLUS,    
    I2C_SPEED_HIGH,         
} i2c_speed_t;
#endif /* ndef DOXYGEN */
 
typedef struct {
    uint8_t module;         
    i2c_speed_t speed;      
    gpio_t scl;             
    gpio_t sda;             
    bool scl_pullup;        
    bool sda_pullup;        
} i2c_conf_t;
 
#define I2C_NUMOF_MAX   (SOC_I2C_NUM)
 
#define PERIPH_I2C_NEED_READ_REG    
#define PERIPH_I2C_NEED_READ_REGS   
#define PERIPH_I2C_NEED_WRITE_REG   
#define PERIPH_I2C_NEED_WRITE_REGS  
typedef struct {
    uint8_t module;         
    ledc_mode_t group;      
    ledc_timer_t timer;     
    uint8_t ch_numof;       
    const gpio_t *gpios;    
} pwm_config_t;
 
#define PWM_NUMOF_MAX       (4)
 
#define PWM_CH_NUMOF_MAX    (SOC_LEDC_CHANNEL_NUM)
 
typedef struct {
    uint8_t channel;    
    gpio_t gpio;        
} rmt_channel_config_t;
 
#define RMT_CH_NUMOF_MAX    (SOC_RMT_CHANNELS_PER_GROUP)
 
#define RNG_DATA_REG_ADDR   (WDEV_RND_REG)
#define RTT_FREQUENCY       (32768UL)
 
#define RTT_MAX_VALUE       (0xFFFFFFFFUL)
 
typedef enum {
#if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
    SDMMC_SLOT_0 = 0,   
#endif
    SDMMC_SLOT_1 = 1,   
} sdmmc_slot_t;
 
typedef struct {
    sdmmc_slot_t slot;  
    gpio_t cd;          
    gpio_t wp;          
#if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
    gpio_t clk;         
    gpio_t cmd;         
    gpio_t dat0;        
    gpio_t dat1;        
    gpio_t dat2;        
    gpio_t dat3;        
#if IS_USED(MODULE_PERIPH_SMMC_8BIT) || DOXYGEN
    gpio_t dat4;        
    gpio_t dat5;        
    gpio_t dat6;        
    gpio_t dat7;        
#endif /* IS_USED(MODULE_PERIPH_SMMC_8BIT) */
#else /* IS_USED(SOC_SDMMC_USE_IOMUX) */
    uint8_t bus_width;  
#endif
} sdmmc_conf_t;
 
#define SDMMC_CPU_DMA_REQUIREMENTS  __attribute__((aligned(SDMMC_CPU_DMA_ALIGNMENT)))
 
#define SDMMC_CPU_DMA_ALIGNMENT     4
 
#ifndef DOXYGEN
#define HAVE_SPI_CLK_T
typedef enum {
    SPI_CLK_100KHZ = 100000,            
    SPI_CLK_400KHZ = 400000,            
    SPI_CLK_1MHZ   = 1000000,           
    SPI_CLK_5MHZ   = 5000000,           
    SPI_CLK_10MHZ  = 10000000           
} spi_clk_t;
#define spi_pin_mosi(dev) spi_config[dev].mosi
#define spi_pin_miso(dev) spi_config[dev].miso
#define spi_pin_clk(dev)  spi_config[dev].sck
#endif /* !DOXYGEN */
 
typedef spi_host_device_t spi_ctrl_t;
 
/*
 * In former ESP-IDF versions, SPI interfaces were identified by the alias
 * names `FSPI`, `HSPI` and `VSPI`, which are sometimes also used in data
 * sheets. These alias names have been declared obsolete in ESP-IDF. For
 * source code compatibility reasons these alias names are defined here.
 */
#if defined(CPU_FAM_ESP32)
#  define HSPI  SPI2_HOST   
#  define VSPI  SPI3_HOST   
#elif defined(CPU_FAM_ESP32S2)
#  define FSPI  SPI2_HOST   
#  define HSPI  SPI3_HOST   
#else
#  define FSPI  SPI2_HOST   
#endif
 
typedef struct {
    spi_ctrl_t ctrl;        
    gpio_t sck;             
    gpio_t mosi;            
    gpio_t miso;            
    gpio_t cs;              
} spi_conf_t;
 
#define SPI_NUMOF_MAX   (SOC_SPI_PERIPH_NUM - 1)
 
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE  
#define PERIPH_SPI_NEEDS_TRANSFER_REG   
#define PERIPH_SPI_NEEDS_TRANSFER_REGS  
#ifndef MODULE_ESP_HW_COUNTER
#  define TIMER_NUMOF           (SOC_TIMER_GROUP_TOTAL_TIMERS - 1)
#  define TIMER_CHANNEL_NUMOF   (1)
#endif
 
#define TIMER_SYSTEM_GROUP      0   /* formerly TIMER_GROUP_0 */
#define TIMER_SYSTEM_INDEX      0   /* formerly TIMER_0 */
#define TIMER_SYSTEM_INT_SRC    ETS_TG0_T0_LEVEL_INTR_SOURCE
 
#define PERIPH_TIMER_PROVIDES_SET
 
typedef struct {
    gpio_t txd;             
    gpio_t rxd;             
} uart_conf_t;
 
#ifndef DOXYGEN
typedef enum {
    UART_STOP_BITS_1   = 0x1,  
    UART_STOP_BITS_1_5 = 0x2,  
    UART_STOP_BITS_2   = 0x3,  
} uart_stop_bits_t;
 
#define HAVE_UART_STOP_BITS_T
 
#define UART_MODE_UNSUPPORTED 0xf0
 
typedef enum {
    UART_PARITY_NONE  = 0x0,
    UART_PARITY_EVEN  = 0x2,
    UART_PARITY_ODD   = 0x3,
    UART_PARITY_MARK  = UART_MODE_UNSUPPORTED | 0,
    UART_PARITY_SPACE = UART_MODE_UNSUPPORTED | 1,
} uart_parity_t;
 
#define UART_PARITY_DISABLE     UART_PARITY_NONE
 
#define HAVE_UART_PARITY_T
 
#endif /* !DOXYGEN */
 
#define UART_NUMOF_MAX      (SOC_UART_NUM)
#include "usbdev_synopsys_dwc2.h"
 
#define USBDEV_NUMOF_MAX    (SOC_USB_PERIPH_NUM)
#ifdef __cplusplus
}
#endif
 
#if defined(CPU_FAM_ESP32)
#  include "periph_cpu_esp32.h"
#elif defined(CPU_FAM_ESP32C3)
#  include "periph_cpu_esp32c3.h"
#elif defined(CPU_FAM_ESP32C6)
#  include "periph_cpu_esp32c6.h"
#elif defined(CPU_FAM_ESP32H2)
#  include "periph_cpu_esp32h2.h"
#elif defined(CPU_FAM_ESP32S2)
#  include "periph_cpu_esp32s2.h"
#elif defined(CPU_FAM_ESP32S3)
#  include "periph_cpu_esp32s3.h"
#else
#  error "ESP32x family implementation missing"
#endif
 
#ifdef MODULE_PERIPH_CAN
#  include "can_esp.h"
#endif