46 #define MII_BMCR            (0x00U)  
   47 #define MII_BMSR            (0x01U)  
   48 #define MII_PHYID1          (0x02U)  
   49 #define MII_PHYID2          (0x03U)  
   50 #define MII_ADVERTISE       (0x04U)  
   51 #define MII_LPA             (0x05U)  
   52 #define MII_EXPANSION       (0x06U)  
   53 #define MII_ESTATUS         (0x0fU)  
   54 #define MII_IRQ             (0x1bU)  
   61 #define MII_BMCR_RESET      BIT15    
   62 #define MII_BMCR_LOOP       BIT14    
   63 #define MII_BMCR_AN_ENABLE  BIT12    
   64 #define MII_BMCR_POWER_DOWN BIT11    
   65 #define MII_BMCR_ISOLATE    BIT10    
   67 #define MII_BMCR_AN_RESTART BIT9     
   68 #define MII_BMCR_FULL_DPLX  BIT8     
   69 #define MII_BMCR_HALF_DPLX  (0)      
   70 #define MII_BMCR_COLL_TEST  BIT7     
   71 #define MII_BMCR_SPEED_10   (0)      
   72 #define MII_BMCR_SPEED_100  BIT13    
   73 #define MII_BMCR_SPEED_1000 BIT6     
   80 #define MII_BMSR_100_T4     BIT15    
   81 #define MII_BMSR_100_TX_F   BIT14    
   82 #define MII_BMSR_100_TX_H   BIT13    
   83 #define MII_BMSR_10_F       BIT12    
   84 #define MII_BMSR_10_H       BIT11    
   85 #define MII_BMSR_100_T2_F   BIT10    
   86 #define MII_BMSR_100_T2_H   BIT9     
   87 #define MII_BMSR_ESTATUS    BIT8     
   89 #define MII_BMSR_AN_DONE    BIT5     
   90 #define MII_BMSR_FAULT      BIT4     
   92 #define MII_BMSR_HAS_AN     BIT3     
   93 #define MII_BMSR_LINK       BIT2     
   94 #define MII_BMSR_JABBER     BIT1     
   95 #define MII_BMSR_EXTENDED   BIT0     
  102 #define MII_ADVERTISE_100_F BIT8     
  103 #define MII_ADVERTISE_100_H BIT7     
  104 #define MII_ADVERTISE_10_F  BIT6     
  105 #define MII_ADVERTISE_10_H  BIT5     
  106 #define MII_ADVERTISE_100   (BIT7 | BIT8)    
  107 #define MII_ADVERTISE_10    (BIT5 | BIT6)    
  114 #define MII_LPA_100_F       BIT8     
  115 #define MII_LPA_100_H       BIT7     
  116 #define MII_LPA_10_F        BIT6     
  117 #define MII_LPA_10_H        BIT5     
  118 #define MII_LPA_100         (BIT7 | BIT8)    
  119 #define MII_LPA_10          (BIT5 | BIT6)    
  126 #define MII_LPA_HAS_AN      BIT0     
  133 #define MII_IRQ_LINK_UP     BIT0     
  134 #define MII_IRQ_RMT_FAULT   BIT1     
  135 #define MII_IRQ_LINK_DOWN   BIT2     
  136 #define MII_IRQ_LPA_ACK     BIT3     
  137 #define MII_IRQ_PD_FAULT    BIT4     
  138 #define MII_IRQ_PAGE_RX     BIT5     
  139 #define MII_IRQ_RX_ERROR    BIT6     
  140 #define MII_IRQ_JABBER      BIT7     
  141 #define MII_IRQ_EN_LINK_UP     BIT8     
  142 #define MII_IRQ_EN_RMT_FAULT   BIT9     
  143 #define MII_IRQ_EN_LINK_DOWN   BIT10    
  144 #define MII_IRQ_EN_LPA_ACK     BIT11     
  145 #define MII_IRQ_EN_PD_FAULT    BIT12     
  146 #define MII_IRQ_EN_PAGE_RX     BIT13     
  147 #define MII_IRQ_EN_RX_ERROR    BIT14     
  148 #define MII_IRQ_EN_JABBER      BIT15     
Helper functions for bit arithmetic.
 
#define MII_BMSR_10_F
PHY supports 10BASE-T, full duplex.
 
#define MII_BMSR_100_T2_H
PHY supports 100BASE-T2, half duplex.
 
static bool mii_can_10_mbps_half_dp(uint16_t bmsr)
Check if an Ethernet PHY supports 10 Mbps at half duplex.
 
#define MII_BMSR_100_TX_H
PHY supports 100BASE-TX, half duplex.
 
static bool mii_can_100_mbps_half_dp(uint16_t bmsr)
Check if an Ethernet PHY supports 100 Mbps at half duplex.
 
static bool mii_can_10_mbps_full_dp(uint16_t bmsr)
Check if an Ethernet PHY supports 10 Mbps at full duplex.
 
#define MII_BMSR_100_T4
PHY supports 100BASE-T4 (half-duplex)
 
static bool mii_can_100_mbps_full_dp(uint16_t bmsr)
Check if an Ethernet PHY supports 100 Mbps at full duplex.
 
#define MII_BMSR_100_TX_F
PHY supports 100BASE-TX, full duplex.
 
#define MII_BMSR_10_H
PHY supports 10BASE-T, half duplex.
 
#define MII_BMSR_100_T2_F
PHY supports 100BASE-T2, full duplex.