FMC peripheral configuration. More...
FMC peripheral configuration.
The GPIOs are defined depending on used memory type according to the FMC pin definition in Table 12 of section 4 in the Datasheet for STM32F765xx, STM32F767xx, STM32F768Ax, STM32F769xx. Which memory types are used is defined by the pseudomodules periph_fmc_nor_sram, periph_fmc_nand and periph_fmc_sdram
#include <cpu_fmc.h>
Data Fields | |
| uint8_t | bus | 
| AHB/APB bus.  | |
| uint32_t | rcc_mask | 
| Bit in clock enable register.  | |
| fmc_gpio_t | data [FMC_DATA_PIN_NUMOF] | 
| Data pins D0 ...  | |
| fmc_gpio_t | addr [FMC_ADDR_PIN_NUMOF] | 
| Address pins A0 ...  More... | |
| fmc_gpio_t | nbl0_pin | 
| NBL0 pin.  | |
| fmc_gpio_t | nbl1_pin | 
| NBL1 pin.  | |
| fmc_gpio_t | nbl2_pin | 
| NBL2 pin.  | |
| fmc_gpio_t | nbl3_pin | 
| NBL3 pin.  | |
| fmc_gpio_t | nwait_pin | 
| NWAIT pin.  | |
| fmc_gpio_t fmc_conf_t::addr[FMC_ADDR_PIN_NUMOF] |