atmega_gpio.h
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1 /*
2  * Copyright (C) 2015 HAW Hamburg
3  * 2016 INRIA
4 
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
25 #ifndef ATMEGA_GPIO_H
26 #define ATMEGA_GPIO_H
27 #include <stddef.h>
28 #include <stdio.h>
29 
30 #include <avr/interrupt.h>
31 
32 #include "cpu.h"
33 #include "board.h"
34 #include "periph/gpio.h"
35 #include "periph_conf.h"
36 #include "periph_cpu.h"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
45 static inline uint8_t atmega_pin_num(gpio_t pin)
46 {
47  return (pin & 0x0f);
48 }
49 
53 static inline uint8_t atmega_port_num(gpio_t pin)
54 {
55  return (pin >> 4) & 0x0f;
56 }
57 
61 static inline uint16_t atmega_pin_addr(gpio_t pin)
62 {
63  return (uintptr_t)atmega_gpio_port(atmega_port_num(pin));
64 }
65 
69 static inline uint16_t atmega_ddr_addr(gpio_t pin)
70 {
71  return atmega_pin_addr(pin) + offsetof(atmega_gpio_port_t, ddr);
72 }
73 
77 static inline uint16_t atmega_port_addr(gpio_t pin)
78 {
79  return atmega_pin_addr(pin) + offsetof(atmega_gpio_port_t, port);
80 }
81 
82 #ifdef __cplusplus
83 }
84 #endif
85 
86 #endif /* ATMEGA_GPIO_H */
static atmega_gpio_port_t * atmega_gpio_port(uint8_t port_num)
Get the GPIO PORT registers of the given GPIO PORT.
static uint16_t atmega_port_addr(gpio_t pin)
Generate the PORTx address of the give pin.
Definition: atmega_gpio.h:77
static uint16_t atmega_ddr_addr(gpio_t pin)
Generate the DDRx address of the given pin.
Definition: atmega_gpio.h:69
static uint8_t atmega_pin_num(gpio_t pin)
Extract the pin number of the given pin.
Definition: atmega_gpio.h:45
static uint16_t atmega_pin_addr(gpio_t pin)
Generate the PINx address of the given pin.
Definition: atmega_gpio.h:61
static uint8_t atmega_port_num(gpio_t pin)
Extract the port number of the given pin.
Definition: atmega_gpio.h:53
Low-level GPIO peripheral driver interface definitions.
stdio wrapper to extend the C libs stdio
Structure describing the memory layout of the registers of a GPIO port on ATmega MCUs.