periph_conf.h
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1 /*
2  * Copyright (C) 2021 ML!PA Consulting GmbH
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #ifndef CLOCK_CORECLOCK
33 #define CLOCK_CORECLOCK MHZ(120)
34 #endif
41 #define EXTERNAL_OSC32_SOURCE 0
42 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 1
49 #define USE_VREG_BUCK (1)
50 
55 static const tc32_conf_t timer_config[] = {
56  { /* Timer 0 - System Clock */
57  .dev = TC0,
58  .irq = TC0_IRQn,
59  .mclk = &MCLK->APBAMASK.reg,
60  .mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
61  .gclk_id = TC0_GCLK_ID,
62  .gclk_src = SAM0_GCLK_TIMER,
63  .flags = TC_CTRLA_MODE_COUNT32,
64  },
65  { /* Timer 1 */
66  .dev = TC2,
67  .irq = TC2_IRQn,
68  .mclk = &MCLK->APBBMASK.reg,
69  .mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
70  .gclk_id = TC2_GCLK_ID,
71  .gclk_src = SAM0_GCLK_TIMER,
72  .flags = TC_CTRLA_MODE_COUNT32,
73  }
74 };
75 
76 /* Timer 0 configuration */
77 #define TIMER_0_CHANNELS 2
78 #define TIMER_0_ISR isr_tc0
79 
80 /* Timer 1 configuration */
81 #define TIMER_1_CHANNELS 2
82 #define TIMER_1_ISR isr_tc2
83 
84 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
91 static const uart_conf_t uart_config[] = {
92  {
93  .dev = &SERCOM3->USART,
94  .rx_pin = GPIO_PIN(PA, 16),
95  .tx_pin = GPIO_PIN(PA, 17),
96 #ifdef MODULE_PERIPH_UART_HW_FC
97  .rts_pin = GPIO_UNDEF,
98  .cts_pin = GPIO_UNDEF,
99 #endif
100  .mux = GPIO_MUX_D,
101  .rx_pad = UART_PAD_RX_1,
102  .tx_pad = UART_PAD_TX_0,
103  .flags = UART_FLAG_NONE,
104  .gclk_src = SAM0_GCLK_PERIPH,
105  },
106 };
107 
108 /* interrupt function name mapping */
109 #define UART_0_ISR isr_sercom3_2
110 #define UART_0_ISR_TX isr_sercom3_0
111 
112 #define UART_NUMOF ARRAY_SIZE(uart_config)
119 #define PWM_0_EN 1
120 
121 #if PWM_0_EN
122 /* PWM0 channels */
123 static const pwm_conf_chan_t pwm_chan0_config[] = {
124  /* GPIO pin, MUX value, TCC channel */
125  { GPIO_PIN(PA, 22), GPIO_MUX_G, 2 },
126 };
127 #endif
128 
129 /* PWM device configuration */
130 static const pwm_conf_t pwm_config[] = {
131 #if PWM_0_EN
132  { .tim = TCC_CONFIG(TCC0),
133  .chan = pwm_chan0_config,
134  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
135  .gclk_src = SAM0_GCLK_PERIPH,
136  },
137 #endif
138 };
139 
140 /* number of devices that are actually defined */
141 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
148 static const spi_conf_t spi_config[] = {
149  {
150  .dev = &(SERCOM1->SPI),
151  .miso_pin = GPIO_PIN(PB, 23),
152  .mosi_pin = GPIO_PIN(PA, 0),
153  .clk_pin = GPIO_PIN(PA, 1),
154  .miso_mux = GPIO_MUX_C,
155  .mosi_mux = GPIO_MUX_D,
156  .clk_mux = GPIO_MUX_D,
157  .miso_pad = SPI_PAD_MISO_3,
158  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
159  .gclk_src = SAM0_GCLK_PERIPH,
160 #ifdef MODULE_PERIPH_DMA
161  .tx_trigger = SERCOM1_DMAC_ID_TX,
162  .rx_trigger = SERCOM1_DMAC_ID_RX,
163 #endif
164  },
165 #ifdef MODULE_PERIPH_SPI_ON_QSPI
166  { /* QSPI in SPI mode */
167  .dev = QSPI,
168  .miso_pin = SAM0_QSPI_PIN_DATA_1,
169  .mosi_pin = SAM0_QSPI_PIN_DATA_0,
170  .clk_pin = SAM0_QSPI_PIN_CLK,
171  .miso_mux = SAM0_QSPI_MUX,
172  .mosi_mux = SAM0_QSPI_MUX,
173  .clk_mux = SAM0_QSPI_MUX,
174  .miso_pad = SPI_PAD_MISO_0, /* unused */
175  .mosi_pad = SPI_PAD_MOSI_0_SCK_1, /* unused */
176  .gclk_src = SAM0_GCLK_MAIN, /* unused */
177 #ifdef MODULE_PERIPH_DMA
178  .tx_trigger = QSPI_DMAC_ID_TX,
179  .rx_trigger = QSPI_DMAC_ID_RX,
180 #endif
181  },
182 #endif
183 };
184 
185 #define SPI_NUMOF ARRAY_SIZE(spi_config)
192 static const i2c_conf_t i2c_config[] = {
193  {
194  .dev = &(SERCOM2->I2CM),
195  .speed = I2C_SPEED_NORMAL,
196  .scl_pin = GPIO_PIN(PA, 12),
197  .sda_pin = GPIO_PIN(PA, 13),
198  .mux = GPIO_MUX_C,
199  .gclk_src = SAM0_GCLK_PERIPH,
200  .flags = I2C_FLAG_NONE
201  },
202 };
203 
204 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
211 #ifndef RTT_FREQUENCY
212 #define RTT_FREQUENCY (32768U)
213 #endif
220 static const sam0_common_usb_config_t sam_usbdev_config[] = {
221  {
222  .dm = GPIO_PIN(PA, 24),
223  .dp = GPIO_PIN(PA, 25),
224  .d_mux = GPIO_MUX_H,
225  .device = &USB->DEVICE,
226  .gclk_src = SAM0_GCLK_PERIPH,
227  }
228 };
236 /* ADC Default values */
237 #define ADC_GCLK_SRC SAM0_GCLK_PERIPH
238 #define ADC_PRESCALER ADC_CTRLA_PRESCALER_DIV8
239 
240 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
241 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
242 
243 static const adc_conf_chan_t adc_channels[] = {
244  /* port, pin, muxpos, dev */
245  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA02, .dev = ADC0 },
246  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA05, .dev = ADC0 },
247  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB08, .dev = ADC0 },
248  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB09, .dev = ADC0 },
249  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA04, .dev = ADC0 },
250  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA06, .dev = ADC0 },
251 };
252 
253 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
260  /* Must not exceed 12 MHz */
261 #define DAC_CLOCK SAM0_GCLK_TIMER
262  /* Use external reference voltage on PA03 */
263  /* (You have to manually connect PA03 with Vcc) */
264  /* Internal reference only gives 1V */
265 #define DAC_VREF DAC_CTRLB_REFSEL_VREFPU
268 #ifdef __cplusplus
269 }
270 #endif
271 
272 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:40
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:222
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:83
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_H
select peripheral function H
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:74
#define ADC0_INPUTCTRL_MUXPOS_PA04
Alias for AIN4.
Definition: periph_cpu.h:130
#define SAM0_QSPI_PIN_CLK
Clock
Definition: periph_cpu.h:269
#define ADC0_INPUTCTRL_MUXPOS_PA05
Alias for AIN5.
Definition: periph_cpu.h:131
#define SAM0_QSPI_PIN_DATA_0
D0 / MOSI
Definition: periph_cpu.h:271
#define SAM0_QSPI_PIN_DATA_1
D1 / MISO
Definition: periph_cpu.h:272
#define ADC0_INPUTCTRL_MUXPOS_PB08
Alias for AIN2.
Definition: periph_cpu.h:128
#define SAM0_QSPI_MUX
QSPI mux
Definition: periph_cpu.h:275
#define ADC0_INPUTCTRL_MUXPOS_PB09
Alias for AIN3.
Definition: periph_cpu.h:129
#define ADC0_INPUTCTRL_MUXPOS_PA06
Alias for AIN6.
Definition: periph_cpu.h:132
#define ADC0_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:126
#define SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
Definition: periph_cpu.h:82
@ SAM0_GCLK_TIMER
4/8MHz clock for timers
Definition: periph_cpu.h:71
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
PWM channel configuration data structure.
PWM device configuration.
tc_tcc_cfg_t tim
timer configuration
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219