- Generated on Thu Mar 27 2025 18:21:02 by
1.9.1
SPI device configuration. More...
SPI device configuration.
SPI configuration data.
Configuration details for an SPI interface needed by the RPX0XX peripheral.
SPI configuration values.
MSP430 x1xx SPI configuration, board level.
MSP430 F2xx/G2xx SPI configuration, board level.
SPI configuration data structure.
SPI module configuration options.
Structure for SPI configuration data.
SPI configuration structure type.
Definition at line 337 of file periph_cpu.h.
#include <periph_cpu.h>
Data Fields | |
| SPI_t * | dev |
| pointer to the used SPI device More... | |
| pwr_reduction_t | pwr |
| Power Management. | |
| gpio_t | sck_pin |
| pin used for SCK | |
| gpio_t | miso_pin |
| pin used for MISO More... | |
| gpio_t | mosi_pin |
| pin used for MOSI More... | |
| gpio_t | ss_pin |
| pin used for SS line | |
| uint8_t | num |
| number of SSI device, i.e. More... | |
| spi_cs_t | cs_pin |
| pin used for CS More... | |
| spi_ctrl_t | ctrl |
| SPI controller used for the interface. | |
| gpio_t | sck |
| GPIO used as SCK pin. | |
| gpio_t | mosi |
| GPIO used as MOSI pin. More... | |
| gpio_t | miso |
| GPIO used as MISO pin. More... | |
| gpio_t | cs |
| GPIO used as CS0 pin. | |
| uint32_t | addr |
| SPI control register address. | |
| gpio_t | sclk |
| SCLK pin. More... | |
| SPI_Type * | dev |
| SPI device base register address. More... | |
| gpio_t | sclk_pin |
| SCLK pin. | |
| uint32_t | rcumask |
| bit in the RCC peripheral enable register | |
| uint8_t | apbbus |
| APBx bus the device is connected to. | |
| gpio_t | pin_miso |
| MISO pin used. | |
| gpio_t | pin_mosi |
| MOSI pin used. | |
| gpio_t | pin_clk |
| CLK pin used. | |
| spi_cs_t | pin_cs [SPI_HWCS_NUMOF] |
| pins used for HW cs lines | |
| uint32_t | simmask |
| bit in the SIM register | |
| unsigned long | ssi_sysctl |
| SSI device in sysctl. | |
| unsigned long | ssi_base |
| SSI base address. | |
| unsigned long | gpio_sysctl |
| GPIO device in sysctl. | |
| unsigned long | gpio_port |
| GPIO port. | |
| struct { | |
| unsigned long clk | |
| pin used for SCK | |
| unsigned long fss | |
| pin used for FSS | |
| unsigned long rx | |
| pin used for MISO | |
| unsigned long tx | |
| pin used for MOSI | |
| unsigned long mask | |
| Pin mask. | |
| } | pins |
| Pin setting. | |
| lpc23xx_spi_t * | dev |
| pointer to the SPI device | |
| uint8_t | pinsel_mosi |
| PINSEL# of the MOSI pin | |
| uint8_t | pinsel_miso |
| PINSEL# of the MISO pin | |
| uint8_t | pinsel_clk |
| PINSEL# of the CLK pin | |
| uint32_t | pinsel_msk_mosi |
| MOSI PINSEL Mask | |
| uint32_t | pinsel_msk_miso |
| MISO PINSEL Mask | |
| uint32_t | pinsel_msk_clk |
| CLK PINSEL Mask | |
| const msp430_usci_spi_params_t * | spi |
| The SPI configuration to use. | |
| const msp430_usart_spi_params_t * | spi |
| The SPI configuration to use. | |
| NRF_SPI_Type * | dev |
| SPI device used. | |
| NRF_SPIM_Type * | dev |
| SPI device used. | |
| SPI0_Type * | dev |
| Base address of the I/O registers of the device. | |
| gpio_t | clk_pin |
| GPIO pin to use for CLK. More... | |
| void * | dev |
| pointer to the used SPI device | |
| gpio_mux_t | miso_mux |
| alternate function for MISO pin (mux) | |
| gpio_mux_t | mosi_mux |
| alternate function for MOSI pin (mux) | |
| gpio_mux_t | clk_mux |
| alternate function for CLK pin (mux) | |
| spi_misopad_t | miso_pad |
| pad to use for MISO line | |
| spi_mosipad_t | mosi_pad |
| pad to use for MOSI and CLK line | |
| uint8_t | gclk_src |
| GCLK source which supplys SERCOM. | |
| Spi * | dev |
| SPI module to use. | |
| uint8_t | id |
| corresponding ID of that module | |
| gpio_t | clk |
| pin mapped to the CLK line | |
| gpio_mux_t | mux |
| pin MUX setting | |
| SPI_TypeDef * | dev |
| SPI device base register address. | |
| gpio_af_t | mosi_af |
| MOSI pin alternate function. | |
| gpio_af_t | miso_af |
| MISO pin alternate function. | |
| gpio_af_t | sclk_af |
| SCLK pin alternate function. | |
| gpio_af_t | cs_af |
| HWCS pin alternate function. | |
| uint32_t | rccmask |
| bit in the RCC peripheral enable register | |
| gpio_t spi_conf_t::clk_pin |
| spi_cs_t spi_conf_t::cs_pin |
pin used for CS
HWCS pin, set to SPI_CS_UNDEF if not mapped.
Definition at line 300 of file periph_cpu.h.
| SPI_Type * spi_conf_t::dev |
| SPI_Type* spi_conf_t::dev |
| gpio_t spi_conf_t::miso |
GPIO used as MISO pin.
pin mapped to the MISO line
MISO pin.
Definition at line 867 of file periph_cpu.h.
| gpio_t spi_conf_t::miso_pin |
pin used for MISO
used MISO pin
GPIO pin to use for MISO.
MISO pin.
Definition at line 341 of file periph_cpu.h.
| gpio_t spi_conf_t::mosi |
GPIO used as MOSI pin.
pin mapped to the MOSI line
MOSI pin.
Definition at line 866 of file periph_cpu.h.
| gpio_t spi_conf_t::mosi_pin |
pin used for MOSI
used MOSI pin
GPIO pin to use for MOSI.
MOSI pin.
Definition at line 342 of file periph_cpu.h.
| uint8_t spi_conf_t::num |
| gpio_t spi_conf_t::sclk |
1.9.1