periph_cpu.h
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1 /*
2  * Copyright (C) 2022 Gunar Schorcht
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #include <stdbool.h>
23 #include <stdint.h>
24 #include "sdkconfig.h"
25 #include "hal/ledc_types.h"
26 #include "hal/spi_types.h"
27 #include "soc/ledc_struct.h"
28 #include "soc/periph_defs.h"
29 #include "soc/soc_caps.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
38 #define STDIO_UART_DEV CONFIG_ESP_CONSOLE_UART_NUM
39 
44 #define PROVIDES_PM_SET_LOWEST
45 #define PROVIDES_PM_RESTART
46 #define PROVIDES_PM_OFF
47 #define PROVIDES_PM_LAYERED_OFF
48 
52 #define PM_NUM_MODES (3U)
53 
58 #define ESP_PM_MODEM_SLEEP (2U)
59 #define ESP_PM_LIGHT_SLEEP (1U)
60 #define ESP_PM_DEEP_SLEEP (0U)
68 #define CPUID_LEN (6U)
69 
81 #define HAVE_GPIO_T
82 typedef unsigned int gpio_t;
89 #define GPIO_UNDEF (0xffffffff)
96 #define GPIO_PIN(x, y) ((x << 5) | y)
103 #define PORT_GPIO (0)
110 #define GPIO_PIN_NUMOF (SOC_GPIO_PIN_COUNT)
113 #ifndef DOXYGEN
119 #define HAVE_GPIO_FLANK_T
120 typedef enum {
121  GPIO_NONE,
122  GPIO_RISING,
123  GPIO_FALLING,
124  GPIO_BOTH,
125  GPIO_LOW,
126  GPIO_HIGH
127 } gpio_flank_t;
135 #define HAVE_GPIO_MODE_T
136 typedef enum {
137  GPIO_IN,
138  GPIO_IN_PD,
139  GPIO_IN_PU,
140  GPIO_OUT,
141  GPIO_OD,
142  GPIO_OD_PU,
143  GPIO_IN_OUT,
144  GPIO_IN_OD,
145  GPIO_IN_OD_PU
146 } gpio_mode_t;
149 /* BEGIN: GPIO LL overwrites */
150 
151 #if SOC_GPIO_PIN_COUNT > 32
152 
153 #define GPIO_PORT_NUMOF 2
154 #define GPIO_PORT_0 0
155 #define GPIO_PORT_1 1
156 #define GPIO_PORT_0_PIN_NUMOF (32)
157 #define GPIO_PORT_1_PIN_NUMOF (SOC_GPIO_PIN_COUNT - 32)
158 #define GPIO_PORT_PIN_NUMOF(p) ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF \
159  : GPIO_PORT_1_PIN_NUMOF)
160 #else
161 
162 #define GPIO_PORT_NUMOF 1
163 #define GPIO_PORT_0 0
164 #define GPIO_PORT_0_PIN_NUMOF (SOC_GPIO_PIN_COUNT)
165 #define GPIO_PORT_PIN_NUMOF(p) ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF : 0)
166 
167 #endif
168 
169 #define HAVE_GPIO_PORT_T
170 typedef uintptr_t gpio_port_t;
171 
172 #define HAVE_GPIO_SLEW_T
173 typedef enum {
174  GPIO_SLEW_SLOWEST = 0,
175  GPIO_SLEW_SLOW = 0,
176  GPIO_SLEW_FAST = 0,
177  GPIO_SLEW_FASTEST = 0,
178 } gpio_slew_t;
179 
180 #define HAVE_GPIO_PULL_STRENGTH_T
181 typedef enum {
182  GPIO_PULL_WEAKEST = 0,
183  GPIO_PULL_WEAK = 0,
184  GPIO_PULL_STRONG = 0,
187 
188 #define HAVE_GPIO_PULL_T
189 typedef enum {
190  GPIO_FLOATING = 0,
191  GPIO_PULL_UP = 1,
192  GPIO_PULL_DOWN = 2,
193  GPIO_PULL_KEEP = 3 /*< not supported */
194 } gpio_pull_t;
195 
199 #define HAVE_GPIO_DRIVE_STRENGTH_T
200 typedef enum {
201  GPIO_DRIVE_WEAKEST = 0,
202  GPIO_DRIVE_WEAK = 1,
203  GPIO_DRIVE_STRONG = 2,
206 
207 /*
208  * @brief Map former enumeration values the new enumeration values for compatibility.
209  */
210 #define GPIO_DRIVE_5 GPIO_DRIVE_WEAKEST
211 #define GPIO_DRIVE_10 GPIO_DRIVE_WEAK
212 #define GPIO_DRIVE_20 GPIO_DRIVE_STRONG
213 #define GPIO_DRIVE_30 GPIO_DRIVE_STRONGEST
215 #define HAVE_GPIO_STATE_T
216 typedef enum {
220  GPIO_INPUT,
223 } gpio_state_t;
224 
225 #define HAVE_GPIO_CONF_T
226 typedef union gpio_conf_esp32 gpio_conf_t;
227 
228 #endif /* ndef DOXYGEN */
229 
235  uint8_t bits;
236  struct {
268  bool initial_value : 1;
269  };
270 };
271 
272 /* END: GPIO LL overwrites */
351 #define ADC_NUMOF_MAX (SOC_ADC_CHANNEL_NUM(0) + SOC_ADC_CHANNEL_NUM(1))
352 
394 #if defined(SOC_DAC_SUPPORTED) || DOXYGEN
395 #define DAC_NUMOF_MAX (SOC_DAC_PERIPH_NUM)
396 #endif
397 
446 #ifndef DOXYGEN
453 #define HAVE_I2C_SPEED_T
454 typedef enum {
455  I2C_SPEED_LOW = 0,
460 } i2c_speed_t;
462 #endif /* ndef DOXYGEN */
463 
467 typedef struct {
468  uint8_t module;
469  i2c_speed_t speed;
470  gpio_t scl;
471  gpio_t sda;
472  bool scl_pullup;
473  bool sda_pullup;
474 } i2c_conf_t;
475 
479 #define I2C_NUMOF_MAX (SOC_I2C_NUM)
480 
481 #define PERIPH_I2C_NEED_READ_REG
482 #define PERIPH_I2C_NEED_READ_REGS
483 #define PERIPH_I2C_NEED_WRITE_REG
484 #define PERIPH_I2C_NEED_WRITE_REGS
576 typedef struct {
577  uint8_t module;
578  ledc_mode_t group;
579  ledc_timer_t timer;
580  uint8_t ch_numof;
581  const gpio_t *gpios;
582 } pwm_config_t;
583 
587 #define PWM_NUMOF_MAX (4)
588 
592 #define PWM_CH_NUMOF_MAX (SOC_LEDC_CHANNEL_NUM)
593 
616 typedef struct {
617  uint8_t channel;
618  gpio_t gpio;
620 
626 #define RMT_CH_NUMOF_MAX (SOC_RMT_CHANNELS_PER_GROUP)
627 
638 #define RNG_DATA_REG_ADDR (WDEV_RND_REG)
653 #define RTT_FREQUENCY (32768UL)
654 
658 #define RTT_MAX_VALUE (0xFFFFFFFFUL)
659 
686 typedef enum {
687 #if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
689 #endif
691 } sdmmc_slot_t;
692 
704 typedef struct {
706  gpio_t cd;
707  gpio_t wp;
708 #if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
709  gpio_t clk;
710  gpio_t cmd;
711  gpio_t dat0;
712  gpio_t dat1;
713  gpio_t dat2;
714  gpio_t dat3;
715 #if IS_USED(MODULE_PERIPH_SMMC_8BIT) || DOXYGEN
716  gpio_t dat4;
717  gpio_t dat5;
718  gpio_t dat6;
719  gpio_t dat7;
720 #endif /* IS_USED(MODULE_PERIPH_SMMC_8BIT) */
721 #else /* IS_USED(SOC_SDMMC_USE_IOMUX) */
722  uint8_t bus_width;
723 #endif
724 } sdmmc_conf_t;
725 
729 #define SDMMC_CPU_DMA_REQUIREMENTS __attribute__((aligned(SDMMC_CPU_DMA_ALIGNMENT)))
730 
734 #define SDMMC_CPU_DMA_ALIGNMENT 4
735 
813 #ifndef DOXYGEN
818 #define HAVE_SPI_CLK_T
819 typedef enum {
820  SPI_CLK_100KHZ = 100000,
821  SPI_CLK_400KHZ = 400000,
822  SPI_CLK_1MHZ = 1000000,
823  SPI_CLK_5MHZ = 5000000,
824  SPI_CLK_10MHZ = 10000000
825 } spi_clk_t;
832 #define spi_pin_mosi(dev) spi_config[dev].mosi
833 #define spi_pin_miso(dev) spi_config[dev].miso
834 #define spi_pin_clk(dev) spi_config[dev].sck
837 #endif /* !DOXYGEN */
838 
842 typedef spi_host_device_t spi_ctrl_t;
843 
844 /*
845  * In former ESP-IDF versions, SPI interfaces were identified by the alias
846  * names `FSPI`, `HSPI` and `VSPI`, which are sometimes also used in data
847  * sheets. These alias names have been declared obsolete in ESP-IDF. For
848  * source code compatibility reasons these alias names are defined here.
849  */
850 #if defined(CPU_FAM_ESP32)
851 #define HSPI SPI2_HOST
852 #define VSPI SPI3_HOST
853 #elif defined(CPU_FAM_ESP32S2)
854 #define FSPI SPI2_HOST
855 #define HSPI SPI3_HOST
856 #else
857 #define FSPI SPI2_HOST
858 #endif
859 
863 typedef struct {
865  gpio_t sck;
866  gpio_t mosi;
867  gpio_t miso;
868  gpio_t cs;
869 } spi_conf_t;
870 
874 #define SPI_NUMOF_MAX (SOC_SPI_PERIPH_NUM - 1)
875 
876 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
877 #define PERIPH_SPI_NEEDS_TRANSFER_REG
878 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
906 #ifndef MODULE_ESP_HW_COUNTER
913 #define TIMER_NUMOF (SOC_TIMER_GROUP_TOTAL_TIMERS - 1)
914 #define TIMER_CHANNEL_NUMOF (1)
915 #endif
916 
918 #define TIMER_SYSTEM_GROUP TIMER_GROUP_0
920 #define TIMER_SYSTEM_INDEX TIMER_0
922 #define TIMER_SYSTEM_INT_SRC ETS_TG0_T0_LEVEL_INTR_SOURCE
923 
929 #define PERIPH_TIMER_PROVIDES_SET
930 
976 typedef struct {
977  gpio_t txd;
978  gpio_t rxd;
979 } uart_conf_t;
980 
984 #define UART_NUMOF_MAX (SOC_UART_NUM)
994 #include "usbdev_synopsys_dwc2.h"
995 
999 #define USBDEV_NUMOF_MAX (SOC_USB_PERIPH_NUM)
1002 #ifdef __cplusplus
1003 }
1004 #endif
1005 
1009 #if defined(CPU_FAM_ESP32)
1010 #include "periph_cpu_esp32.h"
1011 #elif defined(CPU_FAM_ESP32C3)
1012 #include "periph_cpu_esp32c3.h"
1013 #elif defined(CPU_FAM_ESP32S2)
1014 #include "periph_cpu_esp32s2.h"
1015 #elif defined(CPU_FAM_ESP32S3)
1016 #include "periph_cpu_esp32s3.h"
1017 #else
1018 #error "ESP32x family implementation missing"
1019 #endif
1020 
1021 #ifdef MODULE_PERIPH_CAN
1022 #include "can_esp.h"
1023 #endif
1024 
1025 #endif /* PERIPH_CPU_H */
gpio_flank_t
Definition: periph_cpu.h:180
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:165
@ GPIO_IN
select GPIO MASK as input
Definition: periph_cpu.h:164
i2c_speed_t
Definition: periph_cpu.h:276
spi_clk_t
Definition: periph_cpu.h:352
sdmmc_slot_t
SDIO/SDMMC slots.
Definition: periph_cpu.h:686
@ SDMMC_SLOT_1
SD/MMC host controller slot 1.
Definition: periph_cpu.h:690
@ SDMMC_SLOT_0
SD/MMC host controller slot 0 (not usable on ESP32 variant)
Definition: periph_cpu.h:688
spi_ctrl_t
SPI controllers that can be used for peripheral interfaces.
Definition: periph_cpu.h:265
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:91
gpio_pull_t
Enumeration of pull resistor configurations.
Definition: gpio_ll.h:250
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition: gpio_ll.h:268
gpio_state_t
Enumeration of GPIO states (direction)
Definition: gpio_ll.h:158
gpio_slew_t
Enumeration of slew rate settings.
Definition: gpio_ll.h:332
gpio_drive_strength_t
Enumeration of drive strength options.
Definition: gpio_ll.h:299
typedef gpio_conf_t
GPIO pin configuration.
Definition: gpio_ll.h:416
uintptr_t gpio_port_t
GPIO port type.
Definition: gpio_ll.h:87
@ GPIO_FLOATING
No pull ups nor pull downs enabled.
Definition: gpio_ll.h:251
@ GPIO_PULL_KEEP
Keep the signal at current logic level with pull up/down resistors.
Definition: gpio_ll.h:254
@ GPIO_PULL_DOWN
Pull down resistor enabled.
Definition: gpio_ll.h:253
@ GPIO_PULL_UP
Pull up resistor enabled.
Definition: gpio_ll.h:252
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition: gpio_ll.h:269
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition: gpio_ll.h:270
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition: gpio_ll.h:271
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition: gpio_ll.h:272
@ GPIO_OUTPUT_OPEN_SOURCE
Use pin as output in open emitter configuration.
Definition: gpio_ll.h:195
@ GPIO_USED_BY_PERIPHERAL
The GPIO pin is used by a peripheral.
Definition: gpio_ll.h:214
@ GPIO_OUTPUT_OPEN_DRAIN
Use pin as output in open collector configuration.
Definition: gpio_ll.h:182
@ GPIO_OUTPUT_PUSH_PULL
Use pin as output in push-pull configuration.
Definition: gpio_ll.h:169
@ GPIO_DISCONNECT
Disconnect pin from all peripherals.
Definition: gpio_ll.h:242
@ GPIO_INPUT
Use pin as input.
Definition: gpio_ll.h:201
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition: gpio_ll.h:333
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition: gpio_ll.h:336
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition: gpio_ll.h:335
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition: gpio_ll.h:337
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition: gpio_ll.h:302
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition: gpio_ll.h:301
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition: gpio_ll.h:303
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition: gpio_ll.h:300
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:92
@ GPIO_FALLING
emit interrupt on falling flank
Definition: periph_cpu.h:109
@ GPIO_RISING
emit interrupt on rising flank
Definition: periph_cpu.h:110
@ GPIO_BOTH
emit interrupt on both flanks
Definition: periph_cpu.h:111
@ GPIO_OD
configure as output in open-drain mode without pull resistor
Definition: gpio.h:124
@ GPIO_IN_PU
configure as input with pull-up resistor
Definition: gpio.h:122
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:126
@ GPIO_IN_PD
configure as input with pull-down resistor
Definition: gpio.h:121
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition: periph_cpu.h:280
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition: periph_cpu.h:277
@ I2C_SPEED_HIGH
high speed mode: ~3400 kbit/s
Definition: periph_cpu.h:282
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:279
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:357
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:356
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:354
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:355
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:353
ESP32 specific peripheral configuration.
ESP32-C3 specific peripheral configuration.
ESP32-S2 specific peripheral configuration.
ESP32-S3 specific peripheral configuration.
RIOT-OS modification of the bootloader SDK configuration.
I2C configuration structure.
Definition: periph_cpu.h:299
bool scl_pullup
Pullup enabled for SCL pin.
Definition: periph_cpu.h:472
bool sda_pullup
Pullup enabled for SDA pin.
Definition: periph_cpu.h:473
gpio_t sda
GPIO used as SDA pin.
Definition: periph_cpu.h:471
gpio_t scl
GPIO used as SCL pin.
Definition: periph_cpu.h:470
uint8_t module
I2C module identifier.
Definition: periph_cpu.h:468
PWM configuration structure type.
Definition: periph_cpu.h:576
ledc_mode_t group
LEDC channel group used (low/high speed)
Definition: periph_cpu.h:578
ledc_timer_t timer
LEDC timer used by this device.
Definition: periph_cpu.h:579
uint8_t module
LEDC module identifier.
Definition: periph_cpu.h:577
uint8_t ch_numof
Number of channels used by this device.
Definition: periph_cpu.h:580
const gpio_t * gpios
GPIOs used as channels of this device.
Definition: periph_cpu.h:581
RMT channel configuration.
Definition: periph_cpu.h:616
uint8_t channel
channel index
Definition: periph_cpu.h:617
gpio_t gpio
GPIO used as RMT channel.
Definition: periph_cpu.h:618
SDMMC slot configuration.
Definition: periph_cpu.h:704
gpio_t wp
Write Protect pin (must be GPIO_UNDEF if not connected)
Definition: periph_cpu.h:707
gpio_t dat1
DAT[1] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:712
gpio_t dat3
DAT[3] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:714
gpio_t clk
CLK pin (must be defined)
Definition: periph_cpu.h:709
gpio_t dat0
DAT[0] pin (must be defined)
Definition: periph_cpu.h:711
gpio_t dat4
DAT[4] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:716
gpio_t cmd
CMD pin (must be defined)
Definition: periph_cpu.h:710
gpio_t dat6
DAT[6] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:718
gpio_t dat7
DAT[7] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:719
gpio_t dat2
DAT[2] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:713
gpio_t dat5
DAT[5] pin (GPIO_UNDEF if not connected)
Definition: periph_cpu.h:717
sdmmc_slot_t slot
SDMMC slot used [ SDMMC_SLOT_0 | SDMMC_SLOT_1].
Definition: periph_cpu.h:705
gpio_t cd
Card Detect pin (must be GPIO_UNDEF if not connected)
Definition: periph_cpu.h:706
SPI device configuration.
Definition: periph_cpu.h:337
gpio_t mosi
GPIO used as MOSI pin.
Definition: periph_cpu.h:866
spi_ctrl_t ctrl
SPI controller used for the interface.
Definition: periph_cpu.h:864
gpio_t cs
GPIO used as CS0 pin.
Definition: periph_cpu.h:868
gpio_t miso
GPIO used as MISO pin.
Definition: periph_cpu.h:867
gpio_t sck
GPIO used as SCK pin.
Definition: periph_cpu.h:865
UART device configuration.
Definition: periph_cpu.h:218
gpio_t txd
GPIO used as TxD pin.
Definition: periph_cpu.h:977
gpio_t rxd
GPIO used as RxD pin.
Definition: periph_cpu.h:978
GPIO pin configuration for ESP32/ESP32Cx/ESP32Sx MCUs.
Definition: periph_cpu.h:234
bool initial_value
Initial value of the output.
Definition: periph_cpu.h:268
gpio_state_t state
State of the pin.
Definition: periph_cpu.h:240
gpio_drive_strength_t drive_strength
Drive strength of the GPIO.
Definition: periph_cpu.h:254
gpio_pull_t pull
Pull resistor configuration.
Definition: periph_cpu.h:244
uint8_t bits
the raw bits
Definition: periph_cpu.h:235
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.