ESP32-S3 specific peripheral configuration. More...

Detailed Description

ESP32-S3 specific peripheral configuration.

Author: Gunar Schorcht gunar.nosp@m.@sch.nosp@m.orcht.nosp@m..net

Definition in file periph_cpu_esp32s3.h.

#define	CLOCK_CORECLOCK (1000000UL * CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ)
	Mapping configured ESP32-S3 default clock to CLOCK_CORECLOCK define.

#define	CPU_CYCLES_PER_LOOP (5)
	CPU cycles per busy wait loop.

Predefined GPIO names
#define	GPIO0 (GPIO_PIN(PORT_GPIO, 0))

#define	GPIO1 (GPIO_PIN(PORT_GPIO, 1))

#define	GPIO2 (GPIO_PIN(PORT_GPIO, 2))

#define	GPIO3 (GPIO_PIN(PORT_GPIO, 3))

#define	GPIO4 (GPIO_PIN(PORT_GPIO, 4))

#define	GPIO5 (GPIO_PIN(PORT_GPIO, 5))

#define	GPIO6 (GPIO_PIN(PORT_GPIO, 6))

#define	GPIO7 (GPIO_PIN(PORT_GPIO, 7))

#define	GPIO8 (GPIO_PIN(PORT_GPIO, 8))

#define	GPIO9 (GPIO_PIN(PORT_GPIO, 9))

#define	GPIO10 (GPIO_PIN(PORT_GPIO, 10))

#define	GPIO11 (GPIO_PIN(PORT_GPIO, 11))

#define	GPIO12 (GPIO_PIN(PORT_GPIO, 12))

#define	GPIO13 (GPIO_PIN(PORT_GPIO, 13))

#define	GPIO14 (GPIO_PIN(PORT_GPIO, 14))

#define	GPIO15 (GPIO_PIN(PORT_GPIO, 15))

#define	GPIO16 (GPIO_PIN(PORT_GPIO, 16))

#define	GPIO17 (GPIO_PIN(PORT_GPIO, 17))

#define	GPIO18 (GPIO_PIN(PORT_GPIO, 18))

#define	GPIO19 (GPIO_PIN(PORT_GPIO, 19))

#define	GPIO20 (GPIO_PIN(PORT_GPIO, 20))

#define	GPIO21 (GPIO_PIN(PORT_GPIO, 21))

#define	GPIO26 (GPIO_PIN(PORT_GPIO, 26))

#define	GPIO27 (GPIO_PIN(PORT_GPIO, 27))

#define	GPIO28 (GPIO_PIN(PORT_GPIO, 28))

#define	GPIO29 (GPIO_PIN(PORT_GPIO, 29))

#define	GPIO30 (GPIO_PIN(PORT_GPIO, 30))

#define	GPIO31 (GPIO_PIN(PORT_GPIO, 31))

#define	GPIO32 (GPIO_PIN(PORT_GPIO, 32))

#define	GPIO33 (GPIO_PIN(PORT_GPIO, 33))

#define	GPIO34 (GPIO_PIN(PORT_GPIO, 34))

#define	GPIO35 (GPIO_PIN(PORT_GPIO, 35))

#define	GPIO36 (GPIO_PIN(PORT_GPIO, 36))

#define	GPIO37 (GPIO_PIN(PORT_GPIO, 37))

#define	GPIO38 (GPIO_PIN(PORT_GPIO, 38))

#define	GPIO39 (GPIO_PIN(PORT_GPIO, 39))

#define	GPIO40 (GPIO_PIN(PORT_GPIO, 40))

#define	GPIO41 (GPIO_PIN(PORT_GPIO, 41))

#define	GPIO42 (GPIO_PIN(PORT_GPIO, 42))

#define	GPIO43 (GPIO_PIN(PORT_GPIO, 43))

#define	GPIO44 (GPIO_PIN(PORT_GPIO, 44))

#define	GPIO45 (GPIO_PIN(PORT_GPIO, 45))

#define	GPIO46 (GPIO_PIN(PORT_GPIO, 46))

#define	GPIO47 (GPIO_PIN(PORT_GPIO, 47))

#define	GPIO48 (GPIO_PIN(PORT_GPIO, 48))

USB device configuration
ESP32x SoCs have: a bidirectional control endpoint EP0 IN and EP0 OUT six additional endpoints EP1 .. EP6 that can be configured as IN our OUT a maximum of five IN endpoints concurrently active at any time (including EP0 IN) all OUT endpoints share a single RX FIFO each IN endpoint has a dedicated TX FIFO To avoid a lot of special case handling, the maximum number of IN an OUT endpoints including the control endpoint EP0 is 5.
#define	DWC2_USB_OTG_FS_ENABLED 1
	Enable the USB OTG FS peripheral. More...

#define	DWC2_USB_OTG_FS_NUM_EP (5)
	Number of USB OTG FS IN endpoints including the control endpoint.

#define	DWC2_USB_OTG_FS_RX_FIFO_SIZE (128U)
	Size of the FIFO shared by all USB OTG FS OUT endpoints in 32-bit words.

#define	DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE (1024U)
	Total size of the FIFO in bytes.

#define	USBDEV_CPU_DMA_ALIGNMENT (4)
	Buffers have to be word aligned for DMA.

#define	USBDEV_NUM_ENDPOINTS DWC2_USB_OTG_FS_NUM_EP
	Number of USB IN and OUT endpoints available.

Macro Definition Documentation

◆ DWC2_USB_OTG_FS_ENABLED

#define DWC2_USB_OTG_FS_ENABLED 1

Enable the USB OTG FS peripheral.

At the moment, only FS is supported on ESP32x SoCs.

Definition at line 244 of file periph_cpu_esp32s3.h.

Detailed Description

Predefined GPIO names

USB device configuration

Macro Definition Documentation

◆ DWC2_USB_OTG_FS_ENABLED