periph_conf.h
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1 /*
2  * Copyright (C) 2021 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* Add specific clock configuration (HSE, LSE) for this board here */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 #include "periph_cpu.h"
28 #include "clk_conf.h"
29 #include "cfg_timer_tim5.h"
30 #include "cfg_usb_otg_fs_u5.h"
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
40 static const uart_conf_t uart_config[] = {
41  {
42  .dev = USART1,
43  .rcc_mask = RCC_APB2ENR_USART1EN,
44  .rx_pin = GPIO_PIN(PORT_A, 10),
45  .tx_pin = GPIO_PIN(PORT_A, 9),
46  .rx_af = GPIO_AF7,
47  .tx_af = GPIO_AF7,
48  .bus = APB2,
49  .irqn = USART1_IRQn,
50  .type = STM32_USART,
51  .clk_src = 0, /* Use APB clock */
52  },
53  { /* Connected to Arduino D0/D1 and STMOD+2 */
54  .dev = USART3,
55  .rcc_mask = RCC_APB1ENR1_USART3EN,
56  .rx_pin = GPIO_PIN(PORT_D, 9),
57  .tx_pin = GPIO_PIN(PORT_D, 8),
58  .rx_af = GPIO_AF7,
59  .tx_af = GPIO_AF7,
60  .bus = APB1,
61  .irqn = USART3_IRQn,
62  .type = STM32_USART,
63  .clk_src = 0, /* Use APB clock */
64  },
65  { /* Connected to STMOD+1 */
66  .dev = USART2,
67  .rcc_mask = RCC_APB1ENR1_USART2EN,
68  .rx_pin = GPIO_PIN(PORT_A, 3),
69  .tx_pin = GPIO_PIN(PORT_A, 2),
70  .rx_af = GPIO_AF7,
71  .tx_af = GPIO_AF7,
72  .bus = APB1,
73  .irqn = USART2_IRQn,
74  .type = STM32_USART,
75  .clk_src = 0, /* Use APB clock */
76  },
77  { /* Connected to Wireless */
78  .dev = UART4,
79  .rcc_mask = RCC_APB1ENR1_UART4EN,
80  .rx_pin = GPIO_PIN(PORT_C, 11),
81  .tx_pin = GPIO_PIN(PORT_C, 10),
82  .rx_af = GPIO_AF7,
83  .tx_af = GPIO_AF7,
84  .bus = APB1,
85  .irqn = UART4_IRQn,
86  .type = STM32_USART,
87  .clk_src = 0, /* Use APB clock */
88  },
89 };
90 
91 #define UART_0_ISR (isr_usart1)
92 #define UART_1_ISR (isr_usart3)
93 #define UART_2_ISR (isr_usart2)
94 #define UART_3_ISR (isr_uart4)
95 
96 #define UART_NUMOF ARRAY_SIZE(uart_config)
103 static const spi_conf_t spi_config[] = {
104  {
105  .dev = SPI1,
106  .mosi_pin = GPIO_PIN(PORT_E, 15), /* Arduino D11 */
107  .miso_pin = GPIO_PIN(PORT_E, 14), /* Arduino D12 */
108  .sclk_pin = GPIO_PIN(PORT_E, 13), /* Arduino D13 */
109  .cs_pin = GPIO_UNDEF,
110  .mosi_af = GPIO_AF5,
111  .miso_af = GPIO_AF5,
112  .sclk_af = GPIO_AF5,
113  .cs_af = GPIO_AF5,
114  .rccmask = RCC_APB2ENR_SPI1EN,
115  .apbbus = APB2,
116  },
117  { /* Connected to wireless */
118  .dev = SPI2,
119  .mosi_pin = GPIO_PIN(PORT_D, 4),
120  .miso_pin = GPIO_PIN(PORT_D, 3),
121  .sclk_pin = GPIO_PIN(PORT_D, 1),
122  .cs_pin = GPIO_PIN(PORT_B, 12),
123  .mosi_af = GPIO_AF5,
124  .miso_af = GPIO_AF5,
125  .sclk_af = GPIO_AF5,
126  .cs_af = GPIO_AF5,
127  .rccmask = RCC_APB1ENR1_SPI2EN,
128  .apbbus = APB1,
129  },
130  { /* Connected to STMOD+ 2 */
131  .dev = SPI3,
132  .mosi_pin = GPIO_PIN(PORT_D, 6),
133  .miso_pin = GPIO_PIN(PORT_G, 10),
134  .sclk_pin = GPIO_PIN(PORT_G, 9),
135  .cs_pin = GPIO_PIN(PORT_G, 12),
136  .mosi_af = GPIO_AF5,
137  .miso_af = GPIO_AF5,
138  .sclk_af = GPIO_AF5,
139  .cs_af = GPIO_AF5,
140  .rccmask = RCC_APB3ENR_SPI3EN,
141  .apbbus = APB3,
142  },
143 };
144 
145 #define SPI_NUMOF ARRAY_SIZE(spi_config)
152 static const i2c_conf_t i2c_config[] = {
153  {
154  .dev = I2C1,
155  .speed = I2C_SPEED_NORMAL,
156  .scl_pin = GPIO_PIN(PORT_B, 8),
157  .sda_pin = GPIO_PIN(PORT_B, 9),
158  .scl_af = GPIO_AF4,
159  .sda_af = GPIO_AF4,
160  .bus = APB1,
161  .rcc_mask = RCC_APB1ENR1_I2C1EN,
162  .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
163  .irqn = I2C1_ER_IRQn,
164  },
165  {
166  .dev = I2C2,
167  .speed = I2C_SPEED_NORMAL,
168  .scl_pin = GPIO_PIN(PORT_H, 4),
169  .sda_pin = GPIO_PIN(PORT_H, 5),
170  .scl_af = GPIO_AF4,
171  .sda_af = GPIO_AF4,
172  .bus = APB1,
173  .rcc_mask = RCC_APB1ENR1_I2C2EN,
174  .rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
175  .irqn = I2C2_ER_IRQn,
176  },
177 };
178 
179 #define I2C_0_ISR isr_i2c1_er
180 #define I2C_1_ISR isr_i2c2_er
181 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
184 #ifdef __cplusplus
185 }
186 #endif
187 
188 #endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition: periph_cpu.h:48
@ PORT_G
port G
Definition: periph_cpu.h:53
@ PORT_C
port C
Definition: periph_cpu.h:49
@ PORT_E
port E
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:47
@ PORT_D
port D
Definition: periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
@ PORT_H
port H
Definition: periph_cpu.h:52
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
Common configuration for STM32 Timer peripheral based on TIM5.
Common configuration for STM32 OTG FS peripheral for U5 family.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:106
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:109
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:38
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219