periph_conf.h
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1  /*
2  * Copyright (C) 2014-2015,2017 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 /* targeted system core clock */
35 #define CLOCK_CORECLOCK (84000000UL)
36 /* external oscillator clock */
37 #define CLOCK_EXT_OSC (12000000UL)
38 /* define PLL configuration
39  *
40  * The values must fulfill this equation:
41  * CORECLOCK = (EXT_OCS / PLL_DIV) * (PLL_MUL + 1)
42  */
43 #define CLOCK_PLL_MUL (83)
44 #define CLOCK_PLL_DIV (12)
45 
46 /* number of wait states before flash read and write operations */
47 #define CLOCK_FWS (4) /* 4 is save for 84MHz */
56 #ifndef CLOCK_SCLK_XTAL
57 #define CLOCK_SCLK_XTAL (0)
58 #endif
59 
64 static const timer_conf_t timer_config[] = {
65  { .dev = TC0, .id_ch0 = ID_TC0 },
66  { .dev = TC1, .id_ch0 = ID_TC3 }
67 };
68 
69 #define TIMER_0_ISR isr_tc0
70 #define TIMER_1_ISR isr_tc3
71 
72 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
79 #ifndef RTT_FREQUENCY
80 #define RTT_FREQUENCY (1U) /* 1Hz */
81 #endif
88 static const uart_conf_t uart_config[] = {
89  {
90  .dev = (Uart *)UART,
91  .rx_pin = GPIO_PIN(PA, 8),
92  .tx_pin = GPIO_PIN(PA, 9),
93  .mux = GPIO_MUX_A,
94  .pmc_id = ID_UART,
95  .irqn = UART_IRQn
96  },
97  {
98  .dev = (Uart *)USART0,
99  .rx_pin = GPIO_PIN(PA, 10),
100  .tx_pin = GPIO_PIN(PA, 11),
101  .mux = GPIO_MUX_A,
102  .pmc_id = ID_USART0,
103  .irqn = USART0_IRQn
104  },
105  {
106  .dev = (Uart *)USART1,
107  .rx_pin = GPIO_PIN(PA, 12),
108  .tx_pin = GPIO_PIN(PA, 13),
109  .mux = GPIO_MUX_A,
110  .pmc_id = ID_USART1,
111  .irqn = USART1_IRQn
112  },
113  {
114  .dev = (Uart *)USART3,
115  .rx_pin = GPIO_PIN(PD, 5),
116  .tx_pin = GPIO_PIN(PD, 4),
117  .mux = GPIO_MUX_B,
118  .pmc_id = ID_USART3,
119  .irqn = USART3_IRQn
120  }
121 };
122 
123 /* define interrupt vectors */
124 #define UART_0_ISR isr_uart
125 #define UART_1_ISR isr_usart0
126 #define UART_2_ISR isr_usart1
127 #define UART_3_ISR isr_usart3
128 
129 #define UART_NUMOF ARRAY_SIZE(uart_config)
136 static const spi_conf_t spi_config[] = {
137  {
138  .dev = SPI0,
139  .id = ID_SPI0,
140  .clk = GPIO_PIN(PA, 27),
141  .mosi = GPIO_PIN(PA, 26),
142  .miso = GPIO_PIN(PA, 25),
143  .mux = GPIO_MUX_A
144  }
145 };
146 
147 #define SPI_NUMOF ARRAY_SIZE(spi_config)
154 static const pwm_chan_conf_t pwm_chan[] = {
155  { .pin = GPIO_PIN(PC, 21), .hwchan = 4 },
156  { .pin = GPIO_PIN(PC, 22), .hwchan = 5 },
157  { .pin = GPIO_PIN(PC, 23), .hwchan = 6 },
158  { .pin = GPIO_PIN(PC, 24), .hwchan = 7 }
159 };
160 
161 #define PWM_NUMOF (1U)
162 #define PWM_CHAN_NUMOF ARRAY_SIZE(pwm_chan)
165 #ifdef __cplusplus
166 }
167 #endif
168 
169 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:40
@ PC
port C
@ PA
port A
@ PD
port D
@ GPIO_MUX_A
select peripheral function A
@ GPIO_MUX_B
select peripheral function B
PWM channel configuration.
Definition: periph_cpu.h:469
gpio_t pin
pin used for pwm
Definition: periph_cpu.h:471
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
Timer device configuration.
Definition: periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219