periph_conf.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2016-2017 Inria
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
24 #ifndef PERIPH_CONF_H
25 #define PERIPH_CONF_H
26 
27 #include "periph_cpu.h"
28 #include "periph_conf_common.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
38 static const uart_conf_t uart_config[] = {
39  {
40  .dev = &SERCOM5->USART,
41  .rx_pin = GPIO_PIN(PB,23), /* ARDUINO_PIN_13, RX Pin */
42  .tx_pin = GPIO_PIN(PB,22), /* ARDUINO_PIN_14, TX Pin */
43 #ifdef MODULE_PERIPH_UART_HW_FC
44  .rts_pin = GPIO_UNDEF,
45  .cts_pin = GPIO_UNDEF,
46 #endif
47  .mux = GPIO_MUX_D,
48  .rx_pad = UART_PAD_RX_3,
49  .tx_pad = UART_PAD_TX_2,
50  .flags = UART_FLAG_NONE,
51  .gclk_src = SAM0_GCLK_MAIN,
52  }
53 };
54 
55 /* interrupt function name mapping */
56 #define UART_0_ISR isr_sercom5
57 
58 #define UART_NUMOF ARRAY_SIZE(uart_config)
65 static const spi_conf_t spi_config[] = {
66  {
67  .dev = &SERCOM1->SPI,
68  .miso_pin = GPIO_PIN(PA, 19), /* ARDUINO_PIN_8, SERCOM1-MISO */
69  .mosi_pin = GPIO_PIN(PA, 16), /* ARDUINO_PIN_10, SERCOM1-MOSI */
70  .clk_pin = GPIO_PIN(PA, 17), /* ARDUINO_PIN_9, SERCOM1-SCK */
71  .miso_mux = GPIO_MUX_C,
72  .mosi_mux = GPIO_MUX_C,
73  .clk_mux = GPIO_MUX_C,
74  .miso_pad = SPI_PAD_MISO_3,
75  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
76  .gclk_src = SAM0_GCLK_MAIN,
77 #ifdef MODULE_PERIPH_DMA
78  .tx_trigger = SERCOM1_DMAC_ID_TX,
79  .rx_trigger = SERCOM1_DMAC_ID_RX,
80 #endif
81  },
82  {
83  .dev = &SERCOM2->SPI,
84  .miso_pin = GPIO_PIN(PA, 15),
85  .mosi_pin = GPIO_PIN(PA, 12),
86  .clk_pin = GPIO_PIN(PA, 13),
87  .miso_mux = GPIO_MUX_C,
88  .mosi_mux = GPIO_MUX_C,
89  .clk_mux = GPIO_MUX_C,
90  .miso_pad = SPI_PAD_MISO_3,
91  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
92  .gclk_src = SAM0_GCLK_MAIN,
93 #ifdef MODULE_PERIPH_DMA
94  .tx_trigger = SERCOM2_DMAC_ID_TX,
95  .rx_trigger = SERCOM2_DMAC_ID_RX,
96 #endif
97  }
98 };
99 
100 #define SPI_NUMOF ARRAY_SIZE(spi_config)
103 #ifdef __cplusplus
104 }
105 #endif
106 
107 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
Common peripheral configuration for the Particle Mesh.
@ UART_PAD_RX_3
select pad 3
@ PB
port B
@ PA
port A
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:74
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219