periph_conf.h
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1 /*
2  * Copyright (C) 2024 TU Dresden
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* Add specific clock configuration (HSE, LSE) for this board here */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 #include "cfg_timer_tim5.h"
28 #include "cfg_usb_otg_fs_u5.h"
29 #include "clk_conf.h"
30 #include "periph_cpu.h"
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
40 static const uart_conf_t uart_config[] = {
41  {
42  .dev = USART1,
43  .rcc_mask = RCC_APB2ENR_USART1EN,
44  .rx_pin = GPIO_PIN(PORT_A, 10),
45  .tx_pin = GPIO_PIN(PORT_A, 9),
46  .rx_af = GPIO_AF7,
47  .tx_af = GPIO_AF7,
48  .bus = APB2,
49  .irqn = USART1_IRQn,
50  .type = STM32_USART,
51  .clk_src = 0, /* Use APB clock */
52  },
53  {
54  .dev = LPUART1,
55  .rcc_mask = RCC_APB3ENR_LPUART1EN,
56  .rx_pin = GPIO_PIN(PORT_G, 8),
57  .tx_pin = GPIO_PIN(PORT_G, 7),
58  .rx_af = GPIO_AF8,
59  .tx_af = GPIO_AF8,
60  .bus = APB3,
61  .irqn = LPUART1_IRQn,
62  .type = STM32_LPUART,
63  .clk_src = 0, /* Use APB clock */
64  },
65 };
66 
67 #define UART_0_ISR (isr_usart1)
68 #define UART_1_ISR (isr_lpuart1)
69 
70 #define UART_NUMOF ARRAY_SIZE(uart_config)
77 static const spi_conf_t spi_config[] = {
78  {
79  .dev = SPI1,
80  .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
81  .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
82  .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
83  .cs_pin = GPIO_UNDEF,
84  .mosi_af = GPIO_AF5,
85  .miso_af = GPIO_AF5,
86  .sclk_af = GPIO_AF5,
87  .cs_af = GPIO_AF5,
88  .rccmask = RCC_APB2ENR_SPI1EN,
89  .apbbus = APB2,
90  },
91 };
92 
93 #define SPI_NUMOF ARRAY_SIZE(spi_config)
100 static const i2c_conf_t i2c_config[] = {
101  {
102  .dev = I2C1,
103  .speed = I2C_SPEED_NORMAL,
104  .scl_pin = GPIO_PIN(PORT_B, 8),
105  .sda_pin = GPIO_PIN(PORT_B, 9),
106  .scl_af = GPIO_AF4,
107  .sda_af = GPIO_AF4,
108  .bus = APB1,
109  .rcc_mask = RCC_APB1ENR1_I2C1EN,
110  .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
111  .irqn = I2C1_ER_IRQn,
112  },
113  {
114  .dev = I2C2,
115  .speed = I2C_SPEED_NORMAL,
116  .scl_pin = GPIO_PIN(PORT_F, 1),
117  .sda_pin = GPIO_PIN(PORT_F, 0),
118  .scl_af = GPIO_AF4,
119  .sda_af = GPIO_AF4,
120  .bus = APB1,
121  .rcc_mask = RCC_APB1ENR1_I2C2EN,
122  .rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
123  .irqn = I2C2_ER_IRQn,
124  },
125 };
126 
127 #define I2C_0_ISR isr_i2c1_er
128 #define I2C_1_ISR isr_i2c2_er
129 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
147 static const pwm_conf_t pwm_config[] = {
148  { .dev = TIM2,
149  .rcc_mask = RCC_APB1ENR1_TIM2EN,
150  .chan = { { .pin = GPIO_PIN(PORT_A, 0) /* CN10 D32 */, .cc_chan = 0 },
151  { .pin = GPIO_PIN(PORT_A, 1) /* CN10 A8 */, .cc_chan = 1 },
152  { .pin = GPIO_PIN(PORT_A, 2) /* CN9 A1 */, .cc_chan = 2 },
153  { .pin = GPIO_PIN(PORT_A, 3) /* CN9 A0 */, .cc_chan = 3 } },
154  .af = GPIO_AF1,
155  .bus = APB1 },
156  { .dev = TIM3,
157  .rcc_mask = RCC_APB1ENR1_TIM3EN,
158  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* CN7 D25 */, .cc_chan = 0 },
159  { .pin = GPIO_PIN(PORT_B, 5) /* CN7 D22 */, .cc_chan = 1 },
160  { .pin = GPIO_PIN(PORT_B, 0) /* CN9 A3 */, .cc_chan = 2 },
161  { .pin = GPIO_PIN(PORT_B, 1) /* CN10 A6 */, .cc_chan = 3 } },
162  .af = GPIO_AF2,
163  .bus = APB1 },
164  { .dev = TIM4,
165  .rcc_mask = RCC_APB1ENR1_TIM4EN,
166  .chan = { { .pin = GPIO_PIN(PORT_D, 12) /* CN7 D19 */, .cc_chan = 0 },
167  { .pin = GPIO_PIN(PORT_B, 7) /* Blue LD2 */, .cc_chan = 1 },
168  { .pin = GPIO_PIN(PORT_D, 14) /* CN7 D10 */, .cc_chan = 2 },
169  { .pin = GPIO_PIN(PORT_D, 15) /* CN7 D9 */, .cc_chan = 3 } },
170  .af = GPIO_AF2,
171  .bus = APB1 },
172 };
173 
174 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
175 
178 #ifdef __cplusplus
179 }
180 #endif
181 
182 #endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition: periph_cpu.h:48
@ PORT_G
port G
Definition: periph_cpu.h:53
@ PORT_F
port F
Definition: periph_cpu.h:52
@ PORT_A
port A
Definition: periph_cpu.h:47
@ PORT_D
port D
Definition: periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:222
Common configuration for STM32 Timer peripheral based on TIM5.
Common configuration for STM32 OTG FS peripheral for U5 family.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:103
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:104
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:38
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219