periph_conf.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2019 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* Add specific clock configuration (HSE, LSE) for this board here */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 #include "periph_cpu.h"
28 #include "clk_conf.h"
29 #include "cfg_rtt_default.h"
30 #include "cfg_timer_tim2.h"
31 #include "cfg_usb_otg_fs.h"
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
41 static const uart_conf_t uart_config[] = {
42  {
43  .dev = USART2,
44  .rcc_mask = RCC_APB1ENR1_USART2EN,
45  .rx_pin = GPIO_PIN(PORT_D, 6),
46  .tx_pin = GPIO_PIN(PORT_A, 2),
47  .rx_af = GPIO_AF7,
48  .tx_af = GPIO_AF7,
49  .bus = APB1,
50  .irqn = USART2_IRQn,
51 #ifdef MODULE_PERIPH_UART_HW_FC
52  .cts_pin = GPIO_UNDEF,
53  .rts_pin = GPIO_UNDEF,
54  .cts_af = GPIO_AF7,
55  .rts_af = GPIO_AF7,
56 #endif
57  .type = STM32_USART,
58  .clk_src = 0, /* Use APB clock */
59  },
60  { /* Arduino pinout RX/TX pins on D0/D1 */
61  .dev = LPUART1,
62  .rcc_mask = RCC_APB1ENR2_LPUART1EN,
63  .rx_pin = GPIO_PIN(PORT_G, 8),
64  .tx_pin = GPIO_PIN(PORT_G, 7),
65  .rx_af = GPIO_AF8,
66  .tx_af = GPIO_AF8,
67  .bus = APB12,
68  .irqn = LPUART1_IRQn,
69 #ifdef MODULE_PERIPH_UART_HW_FC
70  .cts_pin = GPIO_UNDEF,
71  .rts_pin = GPIO_UNDEF,
72  .cts_af = GPIO_AF7,
73  .rts_af = GPIO_AF7,
74 #endif
75  .type = STM32_LPUART,
76  .clk_src = 0,
77  },
78  { /* STMod+/PMOD connectors */
79  .dev = USART1,
80  .rcc_mask = RCC_APB2ENR_USART1EN,
81  .rx_pin = GPIO_PIN(PORT_G, 10),
82  .tx_pin = GPIO_PIN(PORT_B, 6),
83  .rx_af = GPIO_AF7,
84  .tx_af = GPIO_AF7,
85  .bus = APB2,
86  .irqn = USART1_IRQn,
87 #ifdef MODULE_PERIPH_UART_HW_FC
88  .cts_pin = GPIO_PIN(PORT_G, 11),
89  .rts_pin = GPIO_PIN(PORT_G, 12),
90  .cts_af = GPIO_AF7,
91  .rts_af = GPIO_AF7,
92 #endif
93  .type = STM32_USART,
94  .clk_src = 0, /* Use APB clock */
95  }
96 };
97 
98 #define UART_0_ISR (isr_usart2)
99 #define UART_1_ISR (isr_lpuart1)
100 #define UART_2_ISR (isr_usart1)
101 
102 #define UART_NUMOF ARRAY_SIZE(uart_config)
109 static const i2c_conf_t i2c_config[] = {
110  {
111  .dev = I2C1,
112  .speed = I2C_SPEED_NORMAL,
113  .scl_pin = GPIO_PIN(PORT_B, 8),
114  .sda_pin = GPIO_PIN(PORT_B, 7),
115  .scl_af = GPIO_AF4,
116  .sda_af = GPIO_AF4,
117  .bus = APB1,
118  .rcc_mask = RCC_APB1ENR1_I2C1EN,
119  .rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
120  .irqn = I2C1_ER_IRQn
121  },
122 };
123 
124 #define I2C_0_ISR isr_i2c1_er
125 
126 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
133 static const spi_conf_t spi_config[] = {
134  {
135  .dev = SPI1,
136  .mosi_pin = GPIO_PIN(PORT_B, 5),
137  .miso_pin = GPIO_PIN(PORT_B, 4),
138  .sclk_pin = GPIO_PIN(PORT_A, 5),
139  .cs_pin = SPI_CS_UNDEF,
140  .mosi_af = GPIO_AF5,
141  .miso_af = GPIO_AF5,
142  .sclk_af = GPIO_AF5,
143  .cs_af = GPIO_AF5,
144  .rccmask = RCC_APB2ENR_SPI1EN,
145  .apbbus = APB2
146  }
147 };
148 
149 #define SPI_NUMOF ARRAY_SIZE(spi_config)
152 #ifdef __cplusplus
153 }
154 #endif
155 
156 #endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition: periph_cpu.h:48
@ PORT_G
port G
Definition: periph_cpu.h:53
@ PORT_A
port A
Definition: periph_cpu.h:47
@ PORT_D
port D
Definition: periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
Common configuration for STM32 Timer peripheral based on TIM2.
Common configuration for STM32 OTG FS peripheral.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:38
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:363
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219