25 #ifndef CONFIG_BOARD_HAS_LSE
26 #define CONFIG_BOARD_HAS_LSE 1
30 #ifndef CONFIG_BOARD_HAS_HSE
31 #define CONFIG_BOARD_HAS_HSE 1
35 #ifndef CONFIG_CLOCK_HSE
36 #define CONFIG_CLOCK_HSE MHZ(12)
39 #include "periph_cpu.h"
56 #define DMA_0_ISR isr_dma2_stream3
57 #define DMA_1_ISR isr_dma2_stream2
59 #define DMA_NUMOF ARRAY_SIZE(dma_config)
70 .rcc_mask = RCC_APB1ENR_TIM5EN,
76 #define TIMER_0_ISR isr_tim5
78 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
88 .rcc_mask = RCC_APB2ENR_USART1EN,
95 #ifdef MODULE_PERIPH_DMA
96 .dma = DMA_STREAM_UNDEF,
97 .dma_chan = UINT8_MAX,
102 #define UART_0_ISR (isr_usart1)
104 #define UART_NUMOF ARRAY_SIZE(uart_config)
122 .rccmask = RCC_APB2ENR_SPI1EN,
124 #ifdef MODULE_PERIPH_DMA
133 #define SPI_NUMOF ARRAY_SIZE(spi_config)
149 .rcc_mask = RCC_APB1ENR_I2C2EN,
151 .irqn = I2C2_ER_IRQn,
155 #define I2C_0_ISR isr_i2c2_er
157 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
static const spi_conf_t spi_config[]
SPI configuration.
static const i2c_conf_t i2c_config[]
I2C configuration.
static const timer_conf_t timer_config[]
All timers on board.
Common configuration for STM32 OTG FS peripheral.
@ GPIO_AF5
use alternate function 5
@ GPIO_AF4
use alternate function 4
@ GPIO_AF7
use alternate function 7
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
#define CLOCK_APB1
Half AHB clock.
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
I2C configuration structure.
TWI_t * dev
Pointer to hardware module registers.
SPI device configuration.
SPI_t * dev
pointer to the used SPI device
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
UART device configuration.
USART_t * dev
pointer to the used UART device