periph_conf.h
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1 /*
2  * Copyright (C) 2016 Kees Bakker, SODAQ
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 #include "cfg_clock_default.h"
27 #include "cfg_rtc_default.h"
28 #include "cfg_rtt_default.h"
29 #include "cfg_spi_default.h"
30 #include "cfg_timer_default.h"
31 #include "cfg_usbdev_default.h"
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
42 static const uart_conf_t uart_config[] = {
43  {
44  .dev = &SERCOM0->USART,
45  .rx_pin = GPIO_PIN(PA,9),
46  .tx_pin = GPIO_PIN(PA,10),
47 #ifdef MODULE_PERIPH_UART_HW_FC
48  .rts_pin = GPIO_UNDEF,
49  .cts_pin = GPIO_UNDEF,
50 #endif
51  .mux = GPIO_MUX_C,
52  .rx_pad = UART_PAD_RX_1,
53  .tx_pad = UART_PAD_TX_2,
54  .flags = UART_FLAG_NONE,
55  .gclk_src = SAM0_GCLK_MAIN,
56  },
57  {
58  .dev = &SERCOM5->USART,
59  .rx_pin = GPIO_PIN(PB,31),
60  .tx_pin = GPIO_PIN(PB,30),
61 #ifdef MODULE_PERIPH_UART_HW_FC
62  .rts_pin = GPIO_UNDEF,
63  .cts_pin = GPIO_UNDEF,
64 #endif
65  .mux = GPIO_MUX_D,
66  .rx_pad = UART_PAD_RX_1,
67  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
68  .flags = UART_FLAG_NONE,
69  .gclk_src = SAM0_GCLK_MAIN,
70  },
71  {
72  .dev = &SERCOM4->USART,
73  .rx_pin = GPIO_PIN(PB,13),
74  .tx_pin = GPIO_PIN(PB,14),
75 #ifdef MODULE_PERIPH_UART_HW_FC
76  .rts_pin = GPIO_UNDEF,
77  .cts_pin = GPIO_UNDEF,
78 #endif
79  .mux = GPIO_MUX_C,
80  .rx_pad = UART_PAD_RX_1,
81  .tx_pad = UART_PAD_TX_2,
82  .flags = UART_FLAG_NONE,
83  .gclk_src = SAM0_GCLK_MAIN,
84  },
85  {
86  .dev = &SERCOM1->USART,
87  .rx_pin = GPIO_PIN(PA,17),
88  .tx_pin = GPIO_PIN(PA,18),
89 #ifdef MODULE_PERIPH_UART_HW_FC
90  .rts_pin = GPIO_UNDEF,
91  .cts_pin = GPIO_UNDEF,
92 #endif
93  .mux = GPIO_MUX_C,
94  .rx_pad = UART_PAD_RX_1,
95  .tx_pad = UART_PAD_TX_2,
96  .flags = UART_FLAG_NONE,
97  .gclk_src = SAM0_GCLK_MAIN,
98  },
99 };
100 
101 /* interrupt function name mapping */
102 #define UART_0_ISR isr_sercom0
103 #define UART_1_ISR isr_sercom5
104 #define UART_2_ISR isr_sercom4
105 #define UART_3_ISR isr_sercom1
106 
107 #define UART_NUMOF ARRAY_SIZE(uart_config)
115 /* ADC Default values */
116 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
117 
118 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
119 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
120 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
121 
122 static const adc_conf_chan_t adc_channels[] = {
123  /* port, muxpos/pin */
124  /* Use the Arduino pin number order */
125  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* ADC/AIN[0], A0 */
126  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* ADC/AIN[6], A1 */
127  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* ADC/AIN[5], A2 */
128  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* ADC/AIN[4], A3 */
129  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* ADC/AIN[3], A4 */
130  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* ADC/AIN[2], A5 */
131  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB07 }, /* ADC/AIN[15], A6 */
132  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB06 }, /* ADC/AIN[14], A7 */
133  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB05 }, /* ADC/AIN[13], A8 */
134  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB04 }, /* ADC/AIN[12], A9 */
135  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* ADC/AIN[7], A10 */
136  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB03 }, /* ADC/AIN[11], A11 */
137  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* ADC/AIN[10], A12 */
138  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB01 }, /* ADC/AIN[9], A13 (pin also used for DTR) */
139 
140  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB00 }, /* ADC/AIN[8], BATVOLT */
141 };
142 
143 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
150 #define PWM_0_EN 1
151 #define PWM_1_EN 1
152 
153 #if PWM_0_EN
154 /* PWM0 channels */
155 static const pwm_conf_chan_t pwm_chan0_config[] = {
156  /* GPIO pin, MUX value, TCC channel */
157  { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
158  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
159 };
160 #endif
161 #if PWM_1_EN
162 /* PWM1 channels */
163 static const pwm_conf_chan_t pwm_chan1_config[] = {
164  /* GPIO pin, MUX value, TCC channel */
165  { GPIO_PIN(PA, 16), GPIO_MUX_F, 0 },
166  { GPIO_PIN(PA, 18), GPIO_MUX_F, 2 },
167  { GPIO_PIN(PA, 19), GPIO_MUX_F, 3 }
168 };
169 #endif
170 
171 /* PWM device configuration */
172 static const pwm_conf_t pwm_config[] = {
173 #if PWM_0_EN
174  {TCC_CONFIG(TCC1), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
175 #endif
176 #if PWM_1_EN
177  {TCC_CONFIG(TCC0), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
178 #endif
179 };
180 
181 /* number of devices that are actually defined */
182 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
189 static const i2c_conf_t i2c_config[] = {
190  {
191  .dev = &(SERCOM2->I2CM),
192  .speed = I2C_SPEED_NORMAL,
193  .scl_pin = GPIO_PIN(PA, 13),
194  .sda_pin = GPIO_PIN(PA, 12),
195  .mux = GPIO_MUX_C,
196  .gclk_src = SAM0_GCLK_MAIN,
197  .flags = I2C_FLAG_NONE
198  }
199 };
200 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
203 #ifdef __cplusplus
204 }
205 #endif
206 
207 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:222
Default RTC configuration for SODAQ boards.
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:83
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0_RTS_2_CTS_3
TX is pad 0, on top RTS on pad 2 and CTS on pad 3.
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition: periph_cpu.h:121
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition: periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition: periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PB01
Alias for PIN9.
Definition: periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:126
#define ADC_INPUTCTRL_MUXPOS_PB06
Alias for PIN14.
Definition: periph_cpu.h:133
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition: periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB04
Alias for PIN12.
Definition: periph_cpu.h:131
#define ADC_INPUTCTRL_MUXPOS_PB03
Alias for PIN11.
Definition: periph_cpu.h:130
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PB05
Alias for PIN13.
Definition: periph_cpu.h:132
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:119
#define ADC_INPUTCTRL_MUXPOS_PB07
Alias for PIN15.
Definition: periph_cpu.h:134
#define ADC_INPUTCTRL_MUXPOS_PB00
Alias for PIN8.
Definition: periph_cpu.h:127
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:74
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
PWM channel configuration data structure.
PWM device configuration.
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219