periph_conf.h
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1 /*
2  * Copyright (C) 2018 OTA keys S.A.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* This board provides an LSE */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 /* This board provides an HSE */
28 #ifndef CONFIG_BOARD_HAS_HSE
29 #define CONFIG_BOARD_HAS_HSE 1
30 #endif
31 
32 /* The HSE provides a 12MHz clock */
33 #ifndef CONFIG_CLOCK_HSE
34 #define CONFIG_CLOCK_HSE MHZ(12)
35 #endif
36 
37 #include "periph_cpu.h"
38 #include "clk_conf.h"
39 #include "cfg_timer_tim5.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
49 static const dma_conf_t dma_config[] = {
50  { .stream = 9 }, /* DMA2 Stream 1 - SPI4_TX */
51  { .stream = 8 }, /* DMA2 Stream 0 - SPI4_RX */
52 };
53 
54 #define DMA_0_ISR isr_dma2_stream1
55 #define DMA_1_ISR isr_dma2_stream0
56 
57 #define DMA_NUMOF ARRAY_SIZE(dma_config)
64 static const uart_conf_t uart_config[] = {
65  {
66  .dev = USART1,
67  .rcc_mask = RCC_APB2ENR_USART1EN,
68  .rx_pin = GPIO_PIN(PORT_A, 10),
69  .tx_pin = GPIO_PIN(PORT_A, 9),
70  .rx_af = GPIO_AF7,
71  .tx_af = GPIO_AF7,
72  .bus = APB2,
73  .irqn = USART1_IRQn,
74 #ifdef MODULE_PERIPH_UART_HW_FC
75  .cts_pin = GPIO_UNDEF,
76  .rts_pin = GPIO_UNDEF,
77  .cts_af = GPIO_AF7,
78  .rts_af = GPIO_AF7,
79 #endif
80 #ifdef MODULE_PERIPH_DMA
81  .dma = DMA_STREAM_UNDEF,
82  .dma_chan = UINT8_MAX,
83 #endif
84  },
85  { /* Modem UART */
86  .dev = USART2,
87  .rcc_mask = RCC_APB1ENR_USART2EN,
88  .rx_pin = GPIO_PIN(PORT_D, 6),
89  .tx_pin = GPIO_PIN(PORT_D, 5),
90  .rx_af = GPIO_AF7,
91  .tx_af = GPIO_AF7,
92  .bus = APB1,
93  .irqn = USART2_IRQn,
94 #ifdef MODULE_PERIPH_UART_HW_FC
95  .cts_pin = GPIO_PIN(PORT_D, 3),
96  .rts_pin = GPIO_PIN(PORT_D, 4),
97  .cts_af = GPIO_AF7,
98  .rts_af = GPIO_AF7,
99 #endif
100 #ifdef MODULE_PERIPH_DMA
101  .dma = DMA_STREAM_UNDEF,
102  .dma_chan = UINT8_MAX,
103 #endif
104  },
105  { /* GPS UART */
106  .dev = USART6,
107  .rcc_mask = RCC_APB2ENR_USART6EN,
108  .rx_pin = GPIO_PIN(PORT_C, 7),
109  .tx_pin = GPIO_PIN(PORT_C, 6),
110  .rx_af = GPIO_AF8,
111  .tx_af = GPIO_AF8,
112  .bus = APB2,
113  .irqn = USART6_IRQn,
114 #ifdef MODULE_PERIPH_UART_HW_FC
115  .cts_pin = GPIO_UNDEF,
116  .rts_pin = GPIO_UNDEF,
117  .cts_af = GPIO_AF8,
118  .rts_af = GPIO_AF8,
119 #endif
120 #ifdef MODULE_PERIPH_DMA
121  .dma = DMA_STREAM_UNDEF,
122  .dma_chan = UINT8_MAX,
123 #endif
124  },
125  { /* Arduino Port UART */
126  .dev = USART3,
127  .rcc_mask = RCC_APB1ENR_USART3EN,
128  .rx_pin = GPIO_PIN(PORT_D, 9),
129  .tx_pin = GPIO_PIN(PORT_D, 8),
130  .rx_af = GPIO_AF7,
131  .tx_af = GPIO_AF7,
132  .bus = APB1,
133  .irqn = USART3_IRQn,
134 #ifdef MODULE_PERIPH_UART_HW_FC
135  .cts_pin = GPIO_UNDEF,
136  .rts_pin = GPIO_UNDEF,
137  .cts_af = GPIO_AF7,
138  .rts_af = GPIO_AF7,
139 #endif
140 #ifdef MODULE_PERIPH_DMA
141  .dma = DMA_STREAM_UNDEF,
142  .dma_chan = UINT8_MAX,
143 #endif
144  },
145 };
146 
147 #define UART_0_ISR (isr_usart1)
148 #define UART_1_ISR (isr_usart2)
149 #define UART_2_ISR (isr_usart6)
150 #define UART_3_ISR (isr_usart3)
151 
152 #define UART_NUMOF ARRAY_SIZE(uart_config)
159 static const spi_conf_t spi_config[] = {
160  {
161  .dev = SPI4,
162  .mosi_pin = GPIO_PIN(PORT_E, 6),
163  .miso_pin = GPIO_PIN(PORT_E, 5),
164  .sclk_pin = GPIO_PIN(PORT_E, 2),
165  .cs_pin = GPIO_PIN(PORT_E, 11),
166  .mosi_af = GPIO_AF5,
167  .miso_af = GPIO_AF5,
168  .sclk_af = GPIO_AF5,
169  .cs_af = GPIO_AF5,
170  .rccmask = RCC_APB2ENR_SPI4EN,
171  .apbbus = APB2,
172 #ifdef MODULE_PERIPH_DMA
173  .tx_dma = 0,
174  .tx_dma_chan = 4,
175  .rx_dma = 1,
176  .rx_dma_chan = 4,
177 #endif
178  },
179 };
180 
181 #define SPI_NUMOF ARRAY_SIZE(spi_config)
188 static const i2c_conf_t i2c_config[] = {
189  {
190  .dev = I2C1,
191  .speed = I2C_SPEED_NORMAL,
192  .scl_pin = GPIO_PIN(PORT_B, 6),
193  .sda_pin = GPIO_PIN(PORT_B, 7),
194  .scl_af = GPIO_AF4,
195  .sda_af = GPIO_AF4,
196  .bus = APB1,
197  .rcc_mask = RCC_APB1ENR_I2C1EN,
198  .clk = CLOCK_APB1,
199  .irqn = I2C1_EV_IRQn
200  },
201  {
202  .dev = I2C3,
203  .speed = I2C_SPEED_NORMAL,
204  .scl_pin = GPIO_PIN(PORT_A, 8),
205  .sda_pin = GPIO_PIN(PORT_C, 9),
206  .scl_af = GPIO_AF4,
207  .sda_af = GPIO_AF4,
208  .bus = APB1,
209  .rcc_mask = RCC_APB1ENR_I2C3EN,
210  .clk = CLOCK_APB1,
211  .irqn = I2C3_EV_IRQn
212  }
213 };
214 
215 #define I2C_0_ISR isr_i2c1_ev
216 #define I2C_1_ISR isr_i2c3_ev
217 
218 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
231 static const adc_conf_t adc_config[] = {
232  {GPIO_PIN(PORT_A, 3), 0, 3},
233  {GPIO_PIN(PORT_C, 0), 0, 10},
234  {GPIO_PIN(PORT_C, 3), 0, 4},
235  {GPIO_PIN(PORT_A, 4), 0, 14},
236  {GPIO_PIN(PORT_B, 7), 0, 7},
237  {GPIO_PIN(PORT_B, 6), 0, 6},
238  {GPIO_UNDEF, 0, 18}, /* VBAT */
239 };
240 
241 #define VBAT_ADC ADC_LINE(6)
242 #define ADC_NUMOF ARRAY_SIZE(adc_config)
245 #ifdef __cplusplus
246 }
247 #endif
248 
249 #endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition: periph_cpu.h:48
@ PORT_C
port C
Definition: periph_cpu.h:49
@ PORT_E
port E
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:47
@ PORT_D
port D
Definition: periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:251
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:109
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:379
DMA configuration.
Definition: cpu_dma.h:32
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:55
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219