periph_conf.h
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1 /*
2  * Copyright (C) 2018 Inria
3  * 2020 Gunar Schorcht
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include "periph_cpu.h"
26 #include "cfg_clock_32_1.h"
27 #include "cfg_rtt_default.h"
28 #include "cfg_timer_default.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
37 #define NRF5X_ENABLE_DCDC
38 
43 static const i2c_conf_t i2c_config[] = {
44  {
45  .dev = NRF_TWIM1,
46  .scl = GPIO_PIN(0, 27),
47  .sda = GPIO_PIN(0, 26),
48  .speed = I2C_SPEED_NORMAL
49  },
50  {
51  .dev = NRF_TWIM0,
52  .scl = GPIO_PIN(0, 22),
53  .sda = GPIO_PIN(1, 0),
54  .speed = I2C_SPEED_NORMAL
55  }
56 
57 };
58 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
65 static const pwm_conf_t pwm_config[] = {
66  {
67  .dev = NRF_PWM0,
68  .pin = {
69  GPIO_PIN(1, 4),
70  GPIO_PIN(1, 6),
71  GPIO_PIN(1, 7),
72  GPIO_PIN(1, 11)
73  }
74  },
75  {
76  .dev = NRF_PWM1,
77  .pin = {
78  GPIO_PIN(0, 13),
79  GPIO_PIN(0, 14),
80  GPIO_PIN(1, 9),
81  GPIO_PIN(0, 16)
82  }
83  },
84  {
85  .dev = NRF_PWM2,
86  .pin = {
87  GPIO_PIN(0, 15),
88  GPIO_UNDEF,
89  GPIO_UNDEF,
91  }
92  }
93 };
94 
95 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
102 static const spi_conf_t spi_config[] = {
103  {
104  .dev = NRF_SPIM0,
105  .sclk = GPIO_PIN(1, 15),
106  .mosi = GPIO_PIN(1, 13),
107  .miso = GPIO_PIN(1, 14),
108  },
109  {
110  .dev = NRF_SPIM1,
111  .sclk = GPIO_PIN(0, 17),
112  .mosi = GPIO_PIN(0, 24),
113  .miso = GPIO_PIN(0, 20),
114  }
115 };
116 #define SPI_NUMOF ARRAY_SIZE(spi_config)
123 static const uart_conf_t uart_config[] = {
124  { /* Mapped to USB virtual COM port */
125  .dev = NRF_UARTE0,
126  .rx_pin = GPIO_PIN(0, 8),
127  .tx_pin = GPIO_PIN(0, 6),
128 #ifdef MODULE_PERIPH_UART_HW_FC
129  .rts_pin = GPIO_PIN(0, 25),
130  .cts_pin = GPIO_PIN(0, 7),
131 #endif
132  .irqn = UARTE0_UART0_IRQn,
133  },
134  { /* Mapped to Arduino D0/D1 pins */
135  .dev = NRF_UARTE1,
136  .rx_pin = GPIO_PIN(1, 1),
137  .tx_pin = GPIO_PIN(1, 2),
138 #ifdef MODULE_PERIPH_UART_HW_FC
139  .rts_pin = GPIO_UNDEF,
140  .cts_pin = GPIO_UNDEF,
141 #endif
142  .irqn = UARTE1_IRQn,
143  },
144 };
145 
146 #define UART_0_ISR (isr_uart0)
147 #define UART_1_ISR (isr_uarte1)
148 
149 #define UART_NUMOF ARRAY_SIZE(uart_config)
152 #ifdef __cplusplus
153 }
154 #endif
155 
156 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:222
Common clock configuration for the nRF52 based boards.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219