periph_conf.h
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1 /*
2  * Copyright (C) 2022 SSV Software Systems GmbH
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 #define HFXO_FREQ (39000000UL)
36 #define CMU_HFXOINIT CMU_HFXOINIT_DEFAULT
37 
38 #define LFXO_FREQ (32768UL)
39 #define CMU_LFXOINIT CMU_LFXOINIT_DEFAULT
40 
41 static const clk_mux_t clk_mux_config[] = {
42  { .clk = cmuClock_SYSCLK, .src = cmuSelect_HFXO },
43  { .clk = cmuClock_EM01GRPACLK, .src = cmuSelect_HFXO },
44  { .clk = cmuClock_EM01GRPCCLK, .src = cmuSelect_HFXO },
45  { .clk = cmuClock_EM23GRPACLK, .src = cmuSelect_LFXO },
46  { .clk = cmuClock_EUSART0CLK, .src = cmuSelect_HFXO },
47 };
48 #define CLK_MUX_NUMOF ARRAY_SIZE(clk_mux_config)
49 
50 static const clk_div_t clk_div_config[] = {
51  { .clk = cmuClock_HCLK, .div = 1 },
52  { .clk = cmuClock_PCLK, .div = 1 },
53  { .clk = cmuClock_LSPCLK, .div = 2 },
54 };
55 #define CLK_DIV_NUMOF ARRAY_SIZE(clk_div_config)
62 static const adc_conf_t adc_config[] = {
63  {
64  .dev = IADC0,
65  .cmu = cmuClock_IADC0,
66  .reference = iadcCfgReferenceInt1V2,
67  .reference_mV = 1210,
68  .gain = iadcCfgAnalogGain0P5x,
69  .available_res = { ADC_RES_10BIT, ADC_RES_16BIT }
70  }
71 };
72 
73 static const adc_chan_conf_t adc_channel_config[] = {
74  {
75  .dev = 0,
76  .input_pos = GPIO_PIN(PA, 10),
77  .input_neg = GPIO_UNDEF
78  },
79  {
80  .dev = 0,
81  .input_pos = GPIO_PIN(PA, 0),
82  .input_neg = GPIO_PIN(PA, 5)
83  },
84 };
85 
86 #define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
87 #define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
94 static const i2c_conf_t i2c_config[] = {
95  {
96  .dev = I2C0,
97  .sda_pin = GPIO_PIN(PC, 7),
98  .scl_pin = GPIO_PIN(PC, 5),
99  .cmu = cmuClock_I2C0,
100  .irq = I2C0_IRQn,
101  .speed = I2C_SPEED_NORMAL
102  }
103 };
104 
105 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
106 #define I2C_0_ISR isr_i2c0
113 static const spi_dev_t spi_config[] = {
114  {
115  .dev = USART0,
116  .mosi_pin = GPIO_PIN(PC, 1),
117  .miso_pin = GPIO_PIN(PC, 2),
118  .clk_pin = GPIO_PIN(PC, 3),
119  .cmu = cmuClock_USART0,
120  .irq = USART0_RX_IRQn
121  }
122 };
123 
124 #define SPI_NUMOF ARRAY_SIZE(spi_config)
134 static const timer_conf_t timer_config[] = {
135  {
136  .dev = TIMER0,
137  .cmu = cmuClock_TIMER0,
138  .irq = TIMER0_IRQn
139  },
140  {
141  .dev = LETIMER0,
142  .cmu = cmuClock_LETIMER0,
143  .irq = LETIMER0_IRQn
144  }
145 };
146 
147 #define TIMER_0_ISR isr_timer0
148 #define TIMER_1_ISR isr_letimer0
149 
150 #define TIMER_0_MAX_VALUE TIMER_MAX_VALUE
151 #define TIMER_1_MAX_VALUE LETIMER_MAX_VALUE
152 
153 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
160 static const uart_conf_t uart_config[] = {
161  {
162  .dev = EUSART1,
163  .rx_pin = GPIO_PIN(PA, 9),
164  .tx_pin = GPIO_PIN(PA, 8),
165  .cmu = cmuClock_EUSART1,
166  .irq = EUSART1_RX_IRQn
167  }
168 };
169 #define UART_0_ISR_RX isr_eusart1_rx
170 
171 #define UART_NUMOF ARRAY_SIZE(uart_config)
174 #ifdef __cplusplus
175 }
176 #endif
177 
178 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:40
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:251
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition: adc.h:99
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition: adc.h:96
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ PC
port C
@ PA
port A
ADC channel configuration.
Definition: periph_cpu.h:387
uint8_t dev
device index
Definition: periph_cpu.h:388
ADC device configuration.
Definition: periph_cpu.h:379
ADC_TypeDef * dev
ADC device used.
Definition: periph_cpu.h:380
Clock divider configuration.
Definition: periph_cpu.h:62
CMU_Clock_TypeDef clk
Clock domain.
Definition: periph_cpu.h:63
Clock mux configuration.
Definition: periph_cpu.h:54
CMU_Clock_TypeDef clk
Clock domain.
Definition: periph_cpu.h:55
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
SPI device configuration.
Definition: periph_cpu.h:518
Timer device configuration.
Definition: periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219