ESP32 compile configurations

Compile-time configuration macros for ESP32x SoCs. More...

Detailed Description

Compile-time configuration macros for ESP32x SoCs.

Files
file	cpu_conf.h
	Compile compile-time configurations that are common for all ESP32x SoCs.

Macros
#define	PRINTF_BUFSIZ   256
	Buffer size used for printf functions (maximum length of formatted output).
#define	PUF_SRAM_ATTRIBUTES   __attribute__((used, section(".noinit")))
	Attribute for memory sections required by SRAM PUF.
#define	CPU_HAS_UNALIGNED_ACCESS   1
	Support of unaligned access. More...

Stack size configuration
#define	THREAD_EXTRA_STACKSIZE   (512)
	Extra thread stack size required if newlib-nano is not used.
#define	THREAD_EXTRA_STACKSIZE_PRINTF   (1536)
	Extra thread stack size if printf is used.
#define	THREAD_STACKSIZE_DEFAULT   (2048)
	Default thread stack size.
#define	THREAD_STACKSIZE_IDLE   (2048)
	Stack size for the idle thread.
#define	ESP_WIFI_STACKSIZE   (THREAD_STACKSIZE_DEFAULT + THREAD_EXTRA_STACKSIZE)
	Stack size for the WiFi thread.

Flash page configuration
#define	FLASHPAGE_SIZE   (4096U)
	Size of pages (flash sectors) in bytes.
#define	FLASHPAGE_WRITE_BLOCK_SIZE   (4U)
	Minimum write block size.
#define	FLASHPAGE_WRITE_BLOCK_ALIGNMENT   (4U)
	Write block alignment.
#define	FLASHPAGE_NUMOF   (CONFIG_ESP_FLASHPAGE_CAPACITY / FLASHPAGE_SIZE)
	Number of pages.
#define	CPU_FLASH_BASE   ((uint32_t)&_fp_mem_start)
	CPU base address for flash page access as determined by the linker.

Macro Definition Documentation

CPU_HAS_UNALIGNED_ACCESS

#define CPU_HAS_UNALIGNED_ACCESS   1

Support of unaligned access.

All ESP32x SoCs allow unaligned read/write access to the RAM as well as unaligned read access to the constant data in the flash, which is accessible via the data bus and mapped by the MMU into the data address space of the CPU.

Definition at line 75 of file cpu_conf.h.