TI CC26x0/CC13x0 peripheral memory map

Texas Instruments CC26x0/CC13x0 memory mappings for peripherals. More...

Detailed Description

Texas Instruments CC26x0/CC13x0 memory mappings for peripherals.

#define AUX_AIODIO0_BASE   0x400C1000
 AUX_AIODIO0 base address.
 
#define AUX_AIODIO1_BASE   0x400C2000
 AUX_AIODIO1 base address.
 
#define AUX_TDC_BASE   0x400C4000
 AUX_TDC base address.
 
#define AUX_EVCTL_BASE   0x400C5000
 AUX_EVCTL base address.
 
#define AUX_WUC_BASE   0x400C6000
 AUX_WUC base address.
 
#define AUX_TIMER_BASE   0x400C7000
 AUX_WUC base address.
 
#define AUX_SMPH_BASE   0x400C8000
 AUX_WUC base address.
 
#define AUX_ANAIF_BASE   0x400C9000
 AUX_WUC base address.
 
#define ADI_4_AUX_BASE   0x400CB000
 AUX_WUC base address.
 
#define FCFG_BASE   (0x50001000)
 Base address of FCFG memory.
 
#define DDI0_OSC_BASE   0x400CA000
 DDI0_OSC base address.
 
#define AON_SYSCTL_BASE   0x40090000
 AON_SYSCTL base address.
 
#define AON_WUC_BASE   0x40091000
 AON_WUC base address.
 
#define AON_RTC_BASE   (PERIPH_BASE + 0x92000)
 AON_RTC base address.
 
#define PRCM_BASE   (PERIPH_BASE + 0x82000)
 PRCM base address.
 
#define PRCM_BASE_NONBUF   (PERIPH_BASE_NONBUF + 0x82000)
 PRCM base address (nonbuf)
 
#define AUX_AIODIO0_BASE   (PERIPH_BASE + 0xCC000)
 AUX_AIODIO0 base address.
 
#define AUX_AIODIO1_BASE   (PERIPH_BASE + 0xCD000)
 AUX_AIODIO1 base address.
 
#define AUX_AIODIO2_BASE   (PERIPH_BASE + 0xCE000)
 AUX_AIODIO2 base address.
 
#define AUX_AIODIO3_BASE   (PERIPH_BASE + 0xCF000)
 AUX_AIODIO3 base address.
 
#define AUX_TDC_BASE   (PERIPH_BASE + 0xC4000)
 AUX_TDC base address.
 
#define AUX_EVCTL_BASE   (PERIPH_BASE + 0xC5000)
 AUX_EVCTL base address.
 
#define AUX_SYSIF_BASE   (PERIPH_BASE + 0xC6000)
 AUX_SYSIF base address.
 
#define AUX_TIMER01_BASE   (PERIPH_BASE + 0xC7000)
 AUX_TIMER01 base address.
 
#define AUX_TIMER2_BASE   (PERIPH_BASE + 0xC3000)
 AUX_TIMER2 base address.
 
#define AUX_SMPH_BASE   (PERIPH_BASE + 0xC8000)
 AUX_SMPH base address.
 
#define AUX_ANAIF_BASE   (PERIPH_BASE + 0xC9000)
 AUX_ANAIF base address.
 
#define ADI_4_AUX_BASE   (PERIPH_BASE + 0xCB000)
 ADI_4_AUX base address.
 
#define ADI_4_AUX_BASE_M8   (ADI_4_AUX_BASE + ADI_MASK8B)
 ADI_4_AUX base address for masked 8-bit access.
 
#define FCFG_BASE   (0x50001000)
 FCFG1 base address.
 
#define AON_PMCTL_BASE   (PERIPH_BASE + 0x90000)
 AON_PMCTL base address.
 
#define AON_RTC_BASE   (PERIPH_BASE + 0x92000)
 AON_RTC base address.
 
#define PRCM_BASE   (PERIPH_BASE + 0x82000)
 PRCM base address.
 
#define PRCM_BASE_NONBUF   (PERIPH_BASE_NONBUF + 0x82000)
 PRCM base address (nonbuf)
 
#define FLASH_BASE   0x00000000
 CMSIS includes. More...
 
#define PERIPH_BASE   0x40000000
 Peripheral base address.
 
#define PERIPH_BASE_NONBUF   0x60000000
 Peripheral base address (nonbuf)
 
#define ROM_HARD_API_BASE   0x10000048
 ROM Hard-API base address.
 
#define ROM_API_TABLE   ((uint32_t *) 0x10000180)
 ROM API table.
 
#define ADI_3_REFSYS_BASE   (PERIPH_BASE + 0x86200)
 ADI3 base address.
 
#define ADI_3_REFSYS_BASE_SET   (ADI_3_REFSYS_BASE + ADI_SET)
 ADI3 base address for SET instruction.
 
#define ADI_3_REFSYS_BASE_CLR   (ADI_3_REFSYS_BASE + ADI_CLR)
 ADI3 base address for CLR instruction.
 
#define ADI_3_REFSYS_BASE_M4   (ADI_3_REFSYS_BASE + ADI_MASK4B)
 ADI3 base address for 4-bit masked access.
 
#define CCFG_BASE   (0x50003000)
 CCFG base address.
 
#define GPIO_BASE   (0x40022000)
 GPIO base address.
 
#define I2C_BASE   (PERIPH_BASE + 0x2000)
 I2C base address.
 
#define MCU_IOC_BASE   (0x40081000)
 IOC (MCU) base address.
 
#define AON_IOC_BASE   (PERIPH_BASE + 0x94000)
 AON_IOC base address.
 
#define RFC_DBELL_BASE   (PERIPH_BASE + 0x41000)
 RFC_DBELL base address.
 
#define RFC_DBELL_BASE_NONBUF   (PERIPH_BASE_NONBUF + 0x41000)
 RFC_DBELL base address.
 
#define RFC_PWR_BASE   (PERIPH_BASE + 0x40000)
 RFC_PWR base address.
 
#define RFC_PWR_BASE_NONBUF   (PERIPH_BASE_NONBUF + 0x40000)
 RFC_PWR base address.
 
#define UART0_BASE   (PERIPH_BASE + 0x1000)
 UART0 base address.
 
#define UART1_BASE   (PERIPH_BASE + 0xB000)
 UART1 base address.
 
#define FLASH_BASEADDR   (PERIPH_BASE + 0x30000)
 FLASH base address.
 
#define VIMS_BASE   (PERIPH_BASE + 0x34000)
 VIMS base address.
 
#define WDT_BASE   0x40080000
 WDT base address.
 

Macro Definition Documentation

◆ FLASH_BASE

#define FLASH_BASE   0x00000000

CMSIS includes.

FLASH base address

Definition at line 157 of file cc26xx_cc13xx.h.