nrf24l01p_ng_registers.h File Reference

Register map of NRF24L01+ (NG) devices. More...

Detailed Description

Register map of NRF24L01+ (NG) devices.

Author
Fabian Hüßler fabia.nosp@m.n.hu.nosp@m.essle.nosp@m.r@ov.nosp@m.gu.de

Definition in file nrf24l01p_ng_registers.h.

#include <stdint.h>
#include "nrf24l01p_ng.h"
#include "nrf24l01p_ng_communication.h"
+ Include dependency graph for nrf24l01p_ng_registers.h:

Go to the source code of this file.

Functions

static uint8_t nrf24l01p_ng_reg8_read (const nrf24l01p_ng_t *dev, uint8_t reg_addr)
 Read the contents of an 8 bit register. More...
 
static uint8_t nrf24l01p_ng_reg8_write (const nrf24l01p_ng_t *dev, uint8_t reg_addr, uint8_t reg_val)
 Write the contents of an 8 bit register. More...
 
static uint8_t nrf24l01p_ng_reg8_set (const nrf24l01p_ng_t *dev, uint8_t reg_addr, uint8_t *reg_val)
 Set bits in a certain 8-bit register. More...
 
static uint8_t nrf24l01p_ng_reg8_clear (const nrf24l01p_ng_t *dev, uint8_t reg_addr, uint8_t *reg_val)
 Clear bits in a certain 8-bit register. More...
 
static uint8_t nrf24l01p_ng_reg8_mod (const nrf24l01p_ng_t *dev, uint8_t reg_addr, uint8_t mask, uint8_t *reg_val)
 Modify bits in a certain 8-bit register. More...
 

NRF24L01+ CONFIG register

Address and layout of NRF24L01+ configuration register

#define NRF24L01P_NG_REG_CONFIG   (0x00)
 CONFIG register address.
 
#define NRF24L01P_NG_FLG_MASK_RX_DR   (0x40)
 Flag: MASK_RX_DR.
 
#define NRF24L01P_NG_VAL_MASK_RX_DR(reg)
 Value of: MASK_RX_DR. More...
 
#define NRF24L01P_NG_FLG_MASK_TX_DS   (0x20)
 Flag: MASK_TX_DS.
 
#define NRF24L01P_NG_VAL_MASK_TX_DS(reg)
 Value of: MASK_TX_DS. More...
 
#define NRF24L01P_NG_FLG_MASK_MAX_RT   (0x10)
 Flag: MASK_MAX_RT.
 
#define NRF24L01P_NG_VAL_MASK_MAX_RT
 Value of: MASK_MAX_RT. More...
 
#define NRF24L01P_NG_FLG_EN_CRC   (0x08)
 Flag: EN_CRC.
 
#define NRF24L01P_NG_VAL_EN_CRC(reg)
 Value of: EN_CRC. More...
 
#define NRF24L01P_NG_FLG_CRCO_1_BYTE   (0x00)
 Flag: CRCO - 1 byte.
 
#define NRF24L01P_NG_FLG_CRCO_2_BYTE   (0x04)
 Flag: CRCO - 2 byte.
 
#define NRF24L01P_NG_MSK_CRC   (0x0c)
 Mask to configure CRC.
 
#define NRF24L01P_NG_FLG_CRCO(val)
 Flag: CRCO. More...
 
#define NRF24L01P_NG_VAL_CRCO(reg)
 Value of: CRCO. More...
 
#define NRF24L01P_NG_FLG_PWR_UP   (0x02)
 Flag: PWR_UP.
 
#define NRF24L01P_NG_VAL_PWR_UP(reg)
 Value of: PWR_UP. More...
 
#define NRF24L01P_NG_FLG_PRIM_RX   (0x01)
 Flag: PRIM_RX.
 
#define NRF24L01P_NG_VAL_PRIM_RX(reg)   ((reg) & NRF24L01P_NG_FLG_PRIM_RX)
 Value of: PRIM_RX.
 

NRF24L01+ EN_AA register

Address and layout of NRF24L01+ EN_AA register

#define NRF24L01P_NG_REG_EN_AA   (0x01)
 EN_AA register address.
 
#define NRF24L01P_NG_FLG_ENAA_P5   (0x20)
 Flag: ENAA_P5.
 
#define NRF24L01P_NG_VAL_ENAA_P5(reg)
 Value of: ENAA_P5. More...
 
#define NRF24L01P_NG_FLG_ENAA_P4   (0x10)
 Flag: ENAA_P4.
 
#define NRF24L01P_NG_VAL_ENAA_P4(reg)
 Value of: ENAA_P4. More...
 
#define NRF24L01P_NG_FLG_ENAA_P3   (0x08)
 Flaga: ENAA_P3.
 
#define NRF24L01P_NG_VAL_ENAA_P3(reg)
 Value of: ENAA_P3. More...
 
#define NRF24L01P_NG_FLG_ENAA_P2   (0x04)
 Flag: ENAA_P2.
 
#define NRF24L01P_NG_VAL_ENAA_P2(reg)
 Value of: ENAA_P2. More...
 
#define NRF24L01P_NG_FLG_ENAA_P1   (0x02)
 Flag: ENAA_P1.
 
#define NRF24L01P_NG_VAL_ENAA_P1(reg)
 Value of: ENAA_P1. More...
 
#define NRF24L01P_NG_FLG_ENAA_P0   (0x01)
 Flag: ENAA_P0.
 
#define NRF24L01P_NG_VAL_ENAA_P0(reg)   ((reg) & NRF24L01P_NG_FLG_ENAA_P0)
 Value of: ENAA_P0.
 

NRF24L01+ EN_RXADDR register

Address and layout of NRF24L01+ EN_RXADDR register

#define NRF24L01P_NG_REG_EN_RXADDR   (0x02)
 EN_RXADDR register address.
 
#define NRF24L01P_NG_FLG_ERX_P5   (0x20)
 Flag: ERX_P5.
 
#define NRF24L01P_NG_VAL_ERX_P5(reg)
 Value of: ERX_P5. More...
 
#define NRF24L01P_NG_FLG_ERX_P4   (0x10)
 Flag: ERX_P4.
 
#define NRF24L01P_NG_VAL_ERX_P4(reg)
 Value of ERX_P4. More...
 
#define NRF24L01P_NG_FLG_ERX_P3   (0x08)
 Flag: ERX_P3.
 
#define NRF24L01P_NG_VAL_ERX_P3(reg)
 Value of: ERX_P3. More...
 
#define NRF24L01P_NG_FLG_ERX_P2   (0x04)
 Flag: ERX_P2.
 
#define NRF24L01P_NG_VAL_ERX_P2(reg)
 Value of: ERX_P2. More...
 
#define NRF24L01P_NG_FLG_ERX_P1   (0x02)
 Flag: ERX_P1.
 
#define NRF24L01P_NG_VAL_ERX_P1(reg)
 Value of: ERX_P1. More...
 
#define NRF24L01P_NG_FLG_ERX_P0   (0x01)
 Flag: ERX_P0.
 
#define NRF24L01P_NG_VAL_ERX_P0(reg)   ((reg) & NRF24L01P_NG_FLG_ERX_P0)
 Value of: ERX_P0.
 

NRF24L01+ SETUP_AW register

Address and layout of NRF24L01+ SETUP_AW register

#define NRF24L01P_NG_REG_SETUP_AW   (0x03)
 SETUP_AW register address.
 
#define NRF24L01P_NG_FLG_AW_3   (0x01)
 Flag: AW - 3 bytes.
 
#define NRF24L01P_NG_FLG_AW_4   (0x02)
 Flag: AW - 4 bytes.
 
#define NRF24L01P_NG_FLG_AW_5   (0x03)
 Flag: AW - 5 bytes.
 
#define NRF24L01P_NG_MSK_AW   (0x03)
 Mask to configure AW.
 
#define NRF24L01P_NG_FLG_AW(val)   ((val) & NRF24L01P_NG_MSK_AW)
 Flag AW from value [1; 3].
 
#define NRF24L01P_NG_VAL_AW(reg)   ((reg) & NRF24L01P_NG_MSK_AW)
 Value of: AW.
 

NRF24L01+ SETUP_RETR register

Address and layout of NRF24L01+ SETUP_AW register

#define NRF24L01P_NG_REG_SETUP_RETR   (0x04)
 SETUP_RETR register address.
 
#define NRF24L01P_NG_FLG_ARD_250_US   (0x00)
 Flag: ARD - 250 us.
 
#define NRF24L01P_NG_FLG_ARD_500_US   (0x10)
 Flag: ARD - 500 us.
 
#define NRF24L01P_NG_FLG_ARD_750_US   (0x20)
 Flag: ARD - 750 us.
 
#define NRF24L01P_NG_FLG_ARD_1000_US   (0x30)
 Flag: ARD - 1000 us.
 
#define NRF24L01P_NG_FLG_ARD_1250_US   (0x40)
 Flag: ARD - 1250 us.
 
#define NRF24L01P_NG_FLG_ARD_1500_US   (0x50)
 Flag: ARD - 1500 us.
 
#define NRF24L01P_NG_FLG_ARD_1750_US   (0x60)
 Flag: ARD - 1750 us.
 
#define NRF24L01P_NG_FLG_ARD_2000_US   (0x70)
 Flag: ARD - 2000 us.
 
#define NRF24L01P_NG_FLG_ARD_2250_US   (0x80)
 Flag: ARD - 2250 us.
 
#define NRF24L01P_NG_FLG_ARD_2500_US   (0x90)
 Flag: ARD - 2500 us.
 
#define NRF24L01P_NG_FLG_ARD_2750_US   (0xa0)
 Flag: ARD - 2750 us.
 
#define NRF24L01P_NG_FLG_ARD_3000_US   (0xb0)
 Flag: ARD - 3000 us.
 
#define NRF24L01P_NG_FLG_ARD_3250_US   (0xc0)
 Flag: ARD - 3250 us.
 
#define NRF24L01P_NG_FLG_ARD_3500_US   (0xd0)
 Flag: ARD - 3500 us.
 
#define NRF24L01P_NG_FLG_ARD_3750_US   (0xe0)
 Flag: ARD - 3750 us.
 
#define NRF24L01P_NG_FLG_ARD_4000_US   (0xf0)
 Flag: ARD - 4000 us.
 
#define NRF24L01P_NG_MSK_ARD   (0xf0)
 Mask to configure ARD.
 
#define NRF24L01P_NG_FLG_ARD(val)
 Flag ARD from value [0; 15]. More...
 
#define NRF24L01P_NG_VAL_ARD(reg)
 Value of: ARD. More...
 
#define NRF24L01P_NG_MSK_ARC   (0x0f)
 Mask to configure ARC.
 
#define NRF24L01P_NG_FLG_ARC(val)   ((val) & NRF24L01P_NG_MSK_ARC)
 Flag ARC from value [0; 15].
 
#define NRF24L01P_NG_VAL_ARC(reg)   ((reg) & NRF24L01P_NG_MSK_ARC)
 Value of: ARC.
 

NRF24L01+ RF_CH register

Address and layout of NRF24L01+ SETUP_AW register

#define NRF24L01P_NG_REG_RF_CH   (0x05)
 RF_CH register address.
 
#define NRF24L01P_NG_MSK_RF_CH   (0x7f)
 Mask to configure RF_CH.
 
#define NRF24L01P_NG_FLG_RF_CH(val)   ((val) & NRF24L01P_NG_MSK_RF_CH)
 Flag RF_CH from value [0; 124].
 
#define NRF24L01P_NG_VAL_RF_CH(reg)   ((reg) & NRF24L01P_NG_MSK_RF_CH)
 Value of: RF_CH.
 

NRF24L01+ RF_SETUP register

Address and layout of NRF24L01+ RF_SETUP register

#define NRF24L01P_NG_REG_RF_SETUP   (0x06)
 RF_SETUP register address.
 
#define NRF24L01P_NG_FLG_CONT_WAVE   (0x80)
 Flag: CONT_WAVE.
 
#define NRF24L01P_NG_VAL_CONT_WAVE(reg)
 Value of: CONT_WAVE. More...
 
#define NRF24L01P_NG_FLG_RF_DR_LOW   (0x20)
 Flag: RF_DR_LOW.
 
#define NRF24L01P_NG_VAL_RF_DR_LOW(reg)
 Value of: RF_DR_LOW. More...
 
#define NRF24L01P_NG_FLG_PLL_LOCK   (0x10)
 Flag: PLL_LOCK.
 
#define NRF24L01P_NG_VAL_PLL_LOCK(reg)
 Value of: PLL_LOCK. More...
 
#define NRF24L01P_NG_FLG_RF_DR_HIGH   (0x08)
 Flag: RF_DR_HIGH.
 
#define NRF24L01P_NG_VAL_RF_DR_HIGH(reg)
 Value of: RF_DR_HIGH. More...
 
#define NRF24L01P_NG_FLG_RF_DR_250_KBPS   (0x08)
 Flag: RF_DR - 250 kbit/s.
 
#define NRF24L01P_NG_FLG_RF_DR_1_MBPS   (0x00)
 Flag: RF_DR - 1000 kbit/s.
 
#define NRF24L01P_NG_FLG_RF_DR_2_MBPS   (0x20)
 Flag: RF_DR - 2000 kbit/s.
 
#define NRF24L01P_NG_MSK_RF_DR   (0x28)
 Mask to configure RF_DR.
 
#define NRF24L01P_NG_FLG_RF_DR(val)
 FLG RF_DR. More...
 
#define NRF24L01P_NG_VAL_RF_DR(reg)
 Value of: RF_DR. More...
 
#define NRF24L01P_NG_FLG_RF_PWR_MINUS_18   (0x00)
 Flag: RF_PWR - -18 dbm.
 
#define NRF24L01P_NG_FLG_RF_PWR_MINUS_12   (0x02)
 Flag: RF_PWR - -12 dbm.
 
#define NRF24L01P_NG_FLG_RF_PWR_MINUS_6   (0x04)
 Flag: RF_PWR - -6 dbm.
 
#define NRF24L01P_NG_FLG_RF_PWR_0   (0x06)
 Flag: RF_PWR - 0 dbm.
 
#define NRF24L01P_NG_MSK_RF_PWR   (0x06)
 Mask to configure RF_PWR.
 
#define NRF24L01P_NG_FLG_RF_PWR(val)
 Flag RF_PWR from value [0; 3]. More...
 
#define NRF24L01P_NG_VAL_RF_PWR(reg)
 Value of: RF_PWR. More...
 

NRF24L01+ STATUS register

Address and layout of NRF24L01+ STATUS register

#define NRF24L01P_NG_REG_STATUS   (0x07)
 STATUS register address.
 
#define NRF24L01P_NG_FLG_RX_DR   (0x40)
 Flag: RX_DR.
 
#define NRF24L01P_NG_VAL_RX_DR(reg)
 Value of: RX_DR. More...
 
#define NRF24L01P_NG_FLG_TX_DS   (0x20)
 Flag: TX_DS.
 
#define NRF24L01P_NG_VAL_TX_DS(reg)
 Value of: TX_DS. More...
 
#define NRF24L01P_NG_FLG_MAX_RT   (0x10)
 Flag: MAX_RT.
 
#define NRF24L01P_NG_VAL_MAX_RT(reg)
 Value of: MAX_RT. More...
 
#define NRF24L01P_NG_FLG_RX_P_NO_NONE   (0x0e)
 Flag: RX_P_NO - Rx FIFO empty.
 
#define NRF24L01P_NG_MSK_RX_P_NO   (0x0e)
 Mask to read RX_P_NO.
 
#define NRF24L01P_NG_FLG_RX_P_NO(val)
 Flag RX_P_NO from value [0; 7]. More...
 
#define NRF24L01P_NG_VAL_RX_P_NO(reg)
 Value of: RX_P_NO. More...
 
#define NRF24L01P_NG_FLG_TX_FULL   (0x01)
 Flag: TX_FULL.
 
#define NRF24L01P_NG_VAL_TX_FULL(reg)   ((reg) & NRF24L01P_NG_FLG_TX_FULL)
 Value of: TX_FULL.
 

NRF24L01+ OBSERVE_TX register

Address and layout of NRF24L01+ STATUS register

#define NRF24L01P_NG_REG_OBSERVE_TX   (0x08)
 OBSERVE_TX register address.
 
#define NRF24L01P_NG_MSK_PLOS_CNT   (0xf0)
 Mask to read PLOS_CNT.
 
#define NRF24L01P_NG_FLG_PLOS_CNT(val)
 Flag PLOS_CNT from value [0; 15]. More...
 
#define NRF24L01P_NG_VAL_PLOS_CNT(reg)
 Value of: PLOS_CNT. More...
 
#define NRF24L01P_NG_MSK_ARC_CNT   (0x0f)
 Mask to read ARC_CNT.
 
#define NRF24L01P_NG_FLG_ARC_CNT(val)   ((val) & NRF24L01P_NG_MSK_ARC_CNT)
 Flag ARC_CNT from value [0; 15].
 
#define NRF24L01P_NG_VAL_ARC_CNT(reg)   ((reg) & NRF24L01P_NG_MSK_ARC_CNT)
 Value of: ARC_CNT.
 

NRF24L01+ RPD register

Address and layout of NRF24L01+ RPD register

#define NRF24L01P_NG_REG_RPD   (0x09)
 RPD register address.
 
#define NRF24L01P_NG_FLG_RPD   (0x01)
 Flag: RPD.
 
#define NRF24L01P_NG_VAL_RPD(reg)   ((reg) & NRF24L01P_NG_FLG_RPD)
 Value of: RPD.
 

NRF24L01+ RX_ADDR_Px registers

Addresses of NRF24L01+ RX_ADDR_Px registers and TX_ADDR register

#define NRF24L01P_NG_REG_RX_ADDR_P0   (0x0A)
 RX_ADDR_P0 register address.
 
#define NRF24L01P_NG_REG_RX_ADDR_P1   (0x0B)
 RX_ADDR_P1 register address.
 
#define NRF24L01P_NG_REG_RX_ADDR_P2   (0x0C)
 RX_ADDR_P2 register address.
 
#define NRF24L01P_NG_REG_RX_ADDR_P3   (0x0D)
 RX_ADDR_P3 register address.
 
#define NRF24L01P_NG_REG_RX_ADDR_P4   (0x0E)
 RX_ADDR_P4 register address.
 
#define NRF24L01P_NG_REG_RX_ADDR_P5   (0x0F)
 RX_ADDR_P5 register address.
 
#define NRF24L01P_NG_REG_TX_ADDR   (0x10)
 TX_ADDR register address.
 

NRF24L01+ RX_PW_Px registers

Address and layout of NRF24L01+ RX_PW_Px registers

#define NRF24L01P_NG_REG_RX_PW_P0   (0x11)
 RX_PW_P0 register address.
 
#define NRF24L01P_NG_REG_RX_PW_P1   (0x12)
 RX_PW_P1 register address.
 
#define NRF24L01P_NG_REG_RX_PW_P2   (0x13)
 RX_PW_P2 register address.
 
#define NRF24L01P_NG_REG_RX_PW_P3   (0x14)
 RX_PW_P3 register address.
 
#define NRF24L01P_NG_REG_RX_PW_P4   (0x15)
 RX_PW_P4 register address.
 
#define NRF24L01P_NG_REG_RX_PW_P5   (0x16)
 RX_PW_P5 register address.
 
#define NRF24L01P_NG_MSK_RX_PW_PX   (0x1f)
 Mask to configure RX_PW_PX.
 
#define NRF24L01P_NG_FLG_RX_PW_PX(val)   ((val) & NRF24L01P_NG_MSK_RX_PW_PX)
 Flag RX_PW_Px from value [0; 32].
 
#define NRF24L01P_NG_VAL_RX_PW_PX(reg)   ((reg) & NRF24L01P_NG_MSK_RX_PW_PX)
 Value of: RX_PW_PX.
 

NRF24L01+ FIFO_STATUS register

Address and layout of NRF24L01+ FIFO_STATUS register

#define NRF24L01P_NG_REG_FIFO_STATUS   (0x17)
 FIFO_STATUS register address.
 
#define NRF24L01P_NG_FLG_TX_REUSE   (0x40)
 Flag: TX_REUSE.
 
#define NRF24L01P_NG_VAL_TX_REUSE(reg)
 Value of: TX_REUSE. More...
 
#define NRF24L01P_NG_FLG_TX_FULL_   (0x20)
 Flag: TX_FULL (also indicated in the STATUS register)
 
#define NRF24L01P_NG_VAL_TX_FULL_(reg)
 Value of: TX_FULL. More...
 
#define NRF24L01P_NG_FLG_TX_EMPTY   (0x10)
 Flag: TX_EMPTY.
 
#define NRF24L01P_NG_VAL_TX_EMPTY(reg)
 Value of: TX_EMPTY. More...
 
#define NRF24L01P_NG_FLG_RX_FULL   (0x02)
 Flag: RX_FULL.
 
#define NRF24L01P_NG_VAL_RX_FULL(reg)
 Value of: RX_FULL. More...
 
#define NRF24L01P_NG_FLG_RX_EMPTY   (0x01)
 Flag: RX_EMPTY.
 
#define NRF24L01P_NG_VAL_RX_EMPTY(reg)   ((reg) & NRF24L01P_NG_FLG_RX_EMPTY)
 Value of: RX_EMPTY.
 

NRF24L01+ DYNPD register

Address and layout of NRF24L01+ DYNPD register

#define NRF24L01P_NG_REG_DYNPD   (0x1C)
 DYPD register address.
 
#define NRF24L01P_NG_FLG_DPL_P5   (0x20)
 Flag: DPL_P5.
 
#define NRF24L01P_NG_VAL_DPL_P5(reg)
 Value of: DPL_P5. More...
 
#define NRF24L01P_NG_FLG_DPL_P4   (0x10)
 Flag: DPL_P4.
 
#define NRF24L01P_NG_VAL_DPL_P4(reg)
 Value of DPL_P4. More...
 
#define NRF24L01P_NG_FLG_DPL_P3   (0x08)
 Flag: DPL_P3.
 
#define NRF24L01P_NG_VAL_DPL_P3(reg)
 Value of DPL_P3. More...
 
#define NRF24L01P_NG_FLG_DPL_P2   (0x04)
 Flag: DPL_P2.
 
#define NRF24L01P_NG_VAL_DPL_P2(reg)
 Value of DPL_P2. More...
 
#define NRF24L01P_NG_FLG_DPL_P1   (0x02)
 Flag: DPL_P1.
 
#define NRF24L01P_NG_VAL_DPL_P1(reg)
 Value of: DPL_P1. More...
 
#define NRF24L01P_NG_FLG_DPL_P0   (0x01)
 Flag: DPL_P0.
 
#define NRF24L01P_NG_VAL_DPL_P0(reg)   ((reg) & NRF24L01P_NG_FLG_DPL_P0)
 Value of: DPL_P0.
 

NRF24L01+ FEATURES register

Address and layout of NRF24L01+ FEATURES register

#define NRF24L01P_NG_REG_FEATURES   (0x1D)
 FEATURES register address.
 
#define NRF24L01P_NG_FLG_EN_DPL   (0x04)
 Flag: EN_DPL.
 
#define NRF24L01P_NG_VAL_EN_DPL(reg)
 Value of: EN_DPL. More...
 
#define NRF24L01P_NG_FLG_EN_ACK_PAY   (0x02)
 Flag: EN_ACK_PAY.
 
#define NRF24L01P_NG_VAL_EN_ACK_PAY(reg)
 Value of: EN_ACK_PAY. More...
 
#define NRF24L01P_NG_FLG_EN_DYN_ACK   (0x01)
 Flag: EN_DYN_ACK.
 
#define NRF24L01P_NG_VAL_EN_DYN_ACK(reg)
 Value of: EN_DYN_ACK. More...
 

Macro Definition Documentation

◆ NRF24L01P_NG_FLG_ARD

#define NRF24L01P_NG_FLG_ARD (   val)
Value:
(((val) << 4) & \
NRF24L01P_NG_MSK_ARD)

Flag ARD from value [0; 15].

Definition at line 363 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_FLG_CRCO

#define NRF24L01P_NG_FLG_CRCO (   val)
Value:
(((val) << 2) & \
NRF24L01P_NG_MSK_CRC)

Flag: CRCO.

Definition at line 90 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_FLG_PLOS_CNT

#define NRF24L01P_NG_FLG_PLOS_CNT (   val)
Value:
(((val) << 4) & \
NRF24L01P_NG_MSK_PLOS_CNT)

Flag PLOS_CNT from value [0; 15].

Definition at line 599 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_FLG_RF_DR

#define NRF24L01P_NG_FLG_RF_DR (   val)
Value:
((((val) & 1) << 5) | \
(((val) & 2) << 2))

FLG RF_DR.

Definition at line 473 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_FLG_RF_PWR

#define NRF24L01P_NG_FLG_RF_PWR (   val)
Value:
(((val) << 1) & \
NRF24L01P_NG_MSK_RF_PWR)

Flag RF_PWR from value [0; 3].

Definition at line 506 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_FLG_RX_P_NO

#define NRF24L01P_NG_FLG_RX_P_NO (   val)
Value:
(((val) << 1) & \
NRF24L01P_NG_MSK_RX_P_NO)

Flag RX_P_NO from value [0; 7].

Definition at line 564 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ARD

#define NRF24L01P_NG_VAL_ARD (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_MSK_ARD
Mask to configure ARD.

Value of: ARD.

Definition at line 368 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_CONT_WAVE

#define NRF24L01P_NG_VAL_CONT_WAVE (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_CONT_WAVE
Flag: CONT_WAVE.

Value of: CONT_WAVE.

Definition at line 425 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_CRCO

#define NRF24L01P_NG_VAL_CRCO (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_CRCO_2_BYTE
Flag: CRCO - 2 byte.

Value of: CRCO.

Definition at line 95 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_DPL_P1

#define NRF24L01P_NG_VAL_DPL_P1 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_DPL_P1
Flag: DPL_P1.

Value of: DPL_P1.

Definition at line 831 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_DPL_P2

#define NRF24L01P_NG_VAL_DPL_P2 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_DPL_P2
Flag: DPL_P2.

Value of DPL_P2.

Definition at line 822 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_DPL_P3

#define NRF24L01P_NG_VAL_DPL_P3 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_DPL_P3
Flag: DPL_P3.

Value of DPL_P3.

Definition at line 813 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_DPL_P4

#define NRF24L01P_NG_VAL_DPL_P4 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_DPL_P4
Flag: DPL_P4.

Value of DPL_P4.

Definition at line 804 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_DPL_P5

#define NRF24L01P_NG_VAL_DPL_P5 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_DPL_P5
Flag: DPL_P5.

Value of: DPL_P5.

Definition at line 795 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_EN_ACK_PAY

#define NRF24L01P_NG_VAL_EN_ACK_PAY (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_EN_ACK_PAY
Flag: EN_ACK_PAY.

Value of: EN_ACK_PAY.

Definition at line 869 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_EN_CRC

#define NRF24L01P_NG_VAL_EN_CRC (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_EN_CRC
Flag: EN_CRC.

Value of: EN_CRC.

Definition at line 73 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_EN_DPL

#define NRF24L01P_NG_VAL_EN_DPL (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_EN_DPL
Flag: EN_DPL.

Value of: EN_DPL.

Definition at line 860 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_EN_DYN_ACK

#define NRF24L01P_NG_VAL_EN_DYN_ACK (   reg)
Value:
((reg) & \
#define NRF24L01P_NG_FLG_EN_DYN_ACK
Flag: EN_DYN_ACK.

Value of: EN_DYN_ACK.

Definition at line 878 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ENAA_P1

#define NRF24L01P_NG_VAL_ENAA_P1 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ENAA_P1
Flag: ENAA_P1.

Value of: ENAA_P1.

Definition at line 169 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ENAA_P2

#define NRF24L01P_NG_VAL_ENAA_P2 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ENAA_P2
Flag: ENAA_P2.

Value of: ENAA_P2.

Definition at line 160 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ENAA_P3

#define NRF24L01P_NG_VAL_ENAA_P3 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ENAA_P3
Flaga: ENAA_P3.

Value of: ENAA_P3.

Definition at line 151 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ENAA_P4

#define NRF24L01P_NG_VAL_ENAA_P4 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ENAA_P4
Flag: ENAA_P4.

Value of: ENAA_P4.

Definition at line 142 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ENAA_P5

#define NRF24L01P_NG_VAL_ENAA_P5 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ENAA_P5
Flag: ENAA_P5.

Value of: ENAA_P5.

Definition at line 133 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ERX_P1

#define NRF24L01P_NG_VAL_ERX_P1 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ERX_P1
Flag: ERX_P1.

Value of: ERX_P1.

Definition at line 234 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ERX_P2

#define NRF24L01P_NG_VAL_ERX_P2 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ERX_P2
Flag: ERX_P2.

Value of: ERX_P2.

Definition at line 225 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ERX_P3

#define NRF24L01P_NG_VAL_ERX_P3 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ERX_P3
Flag: ERX_P3.

Value of: ERX_P3.

Definition at line 216 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ERX_P4

#define NRF24L01P_NG_VAL_ERX_P4 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ERX_P4
Flag: ERX_P4.

Value of ERX_P4.

Definition at line 207 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_ERX_P5

#define NRF24L01P_NG_VAL_ERX_P5 (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_ERX_P5
Flag: ERX_P5.

Value of: ERX_P5.

Definition at line 198 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_MASK_MAX_RT

#define NRF24L01P_NG_VAL_MASK_MAX_RT
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_MASK_MAX_RT
Flag: MASK_MAX_RT.

Value of: MASK_MAX_RT.

Definition at line 64 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_MASK_RX_DR

#define NRF24L01P_NG_VAL_MASK_RX_DR (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_MASK_RX_DR
Flag: MASK_RX_DR.

Value of: MASK_RX_DR.

Definition at line 46 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_MASK_TX_DS

#define NRF24L01P_NG_VAL_MASK_TX_DS (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_MASK_TX_DS
Flag: MASK_TX_DS.

Value of: MASK_TX_DS.

Definition at line 55 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_MAX_RT

#define NRF24L01P_NG_VAL_MAX_RT (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_MAX_RT
Flag: MAX_RT.

Value of: MAX_RT.

Definition at line 550 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_PLL_LOCK

#define NRF24L01P_NG_VAL_PLL_LOCK (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_PLL_LOCK
Flag: PLL_LOCK.

Value of: PLL_LOCK.

Definition at line 443 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_PLOS_CNT

#define NRF24L01P_NG_VAL_PLOS_CNT (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_MSK_PLOS_CNT
Mask to read PLOS_CNT.

Value of: PLOS_CNT.

Definition at line 604 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_PWR_UP

#define NRF24L01P_NG_VAL_PWR_UP (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_PWR_UP
Flag: PWR_UP.

Value of: PWR_UP.

Definition at line 104 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RF_DR

#define NRF24L01P_NG_VAL_RF_DR (   reg)
Value:
((((reg) & \
| \
(((reg) & \
NRF24L01P_NG_FLG_RF_DR_HIGH) >> 2))
#define NRF24L01P_NG_FLG_RF_DR_LOW
Flag: RF_DR_LOW.

Value of: RF_DR.

Definition at line 478 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RF_DR_HIGH

#define NRF24L01P_NG_VAL_RF_DR_HIGH (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_RF_DR_HIGH
Flag: RF_DR_HIGH.

Value of: RF_DR_HIGH.

Definition at line 452 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RF_DR_LOW

#define NRF24L01P_NG_VAL_RF_DR_LOW (   reg)
Value:
(((reg) & \

Value of: RF_DR_LOW.

Definition at line 434 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RF_PWR

#define NRF24L01P_NG_VAL_RF_PWR (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_MSK_RF_PWR
Mask to configure RF_PWR.

Value of: RF_PWR.

Definition at line 511 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RX_DR

#define NRF24L01P_NG_VAL_RX_DR (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_RX_DR
Flag: RX_DR.

Value of: RX_DR.

Definition at line 532 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RX_FULL

#define NRF24L01P_NG_VAL_RX_FULL (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_RX_FULL
Flag: RX_FULL.

Value of: RX_FULL.

Definition at line 766 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_RX_P_NO

#define NRF24L01P_NG_VAL_RX_P_NO (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_MSK_RX_P_NO
Mask to read RX_P_NO.

Value of: RX_P_NO.

Definition at line 569 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_TX_DS

#define NRF24L01P_NG_VAL_TX_DS (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_TX_DS
Flag: TX_DS.

Value of: TX_DS.

Definition at line 541 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_TX_EMPTY

#define NRF24L01P_NG_VAL_TX_EMPTY (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_TX_EMPTY
Flag: TX_EMPTY.

Value of: TX_EMPTY.

Definition at line 757 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_TX_FULL_

#define NRF24L01P_NG_VAL_TX_FULL_ (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_TX_FULL_
Flag: TX_FULL (also indicated in the STATUS register)

Value of: TX_FULL.

Definition at line 748 of file nrf24l01p_ng_registers.h.

◆ NRF24L01P_NG_VAL_TX_REUSE

#define NRF24L01P_NG_VAL_TX_REUSE (   reg)
Value:
(((reg) & \
#define NRF24L01P_NG_FLG_TX_REUSE
Flag: TX_REUSE.

Value of: TX_REUSE.

Definition at line 738 of file nrf24l01p_ng_registers.h.

Function Documentation

◆ nrf24l01p_ng_reg8_clear()

static uint8_t nrf24l01p_ng_reg8_clear ( const nrf24l01p_ng_t dev,
uint8_t  reg_addr,
uint8_t *  reg_val 
)
inlinestatic

Clear bits in a certain 8-bit register.

Parameters
[in]devNRF24L01+ device handle
[in]reg_addrAddress of the register to be modified
[in,out]reg_valRegister bits that are being cleared
Returns
Status register value

Definition at line 939 of file nrf24l01p_ng_registers.h.

◆ nrf24l01p_ng_reg8_mod()

static uint8_t nrf24l01p_ng_reg8_mod ( const nrf24l01p_ng_t dev,
uint8_t  reg_addr,
uint8_t  mask,
uint8_t *  reg_val 
)
inlinestatic

Modify bits in a certain 8-bit register.

Parameters
[in]devNRF24L01+ device handle
[in]reg_addrAddress of the register to be modified
[in]maskMask of bits to be modified
[in,out]reg_valRegister bits that are being modified
Returns
Status register value

Definition at line 958 of file nrf24l01p_ng_registers.h.

◆ nrf24l01p_ng_reg8_read()

static uint8_t nrf24l01p_ng_reg8_read ( const nrf24l01p_ng_t dev,
uint8_t  reg_addr 
)
inlinestatic

Read the contents of an 8 bit register.

Parameters
[in]devNRF24L01+ device handle
[in]reg_addrAddress of the register to be written
Returns
Register value

Definition at line 891 of file nrf24l01p_ng_registers.h.

◆ nrf24l01p_ng_reg8_set()

static uint8_t nrf24l01p_ng_reg8_set ( const nrf24l01p_ng_t dev,
uint8_t  reg_addr,
uint8_t *  reg_val 
)
inlinestatic

Set bits in a certain 8-bit register.

Parameters
[in]devNRF24L01+ device handle
[in]reg_addrAddress of the register to be modified
[in,out]reg_valRegister bits that are being set
Returns
Status register value

Definition at line 922 of file nrf24l01p_ng_registers.h.

◆ nrf24l01p_ng_reg8_write()

static uint8_t nrf24l01p_ng_reg8_write ( const nrf24l01p_ng_t dev,
uint8_t  reg_addr,
uint8_t  reg_val 
)
inlinestatic

Write the contents of an 8 bit register.

Parameters
[in]devNRF24L01+ device handle
[in]reg_addrAddress of the register to be written
[in]reg_valValue to be written to the register
Returns
Status register value

Definition at line 907 of file nrf24l01p_ng_registers.h.