Bank configuration structure for NOR/PSRAM/SRAM. More...

Detailed Description

Bank configuration structure for NOR/PSRAM/SRAM.

Definition at line 175 of file cpu_fmc.h.

#include <cpu_fmc.h>

Data Fields
uint8_t	sub_bank
	Bank1 has 4 subbanks 1..4.

bool	mux_enable
	Multiplexed address/data signals used (only valid for PSRAMs and NORs.

bool	wait_enable
	Wait signal used for synchronous access.

bool	ext_mode
	Extended mode used (separate read and write timings)

fmc_nor_sram_timing_t	r_timing
	Read timings (also used for write if fmc_nor_sram_bank_conf_t::ext_mode is false)

fmc_nor_sram_timing_t	w_timing
	Write timings (only used if fmc_nor_sram_bank_conf_t::ext_mode is true)

The documentation for this struct was generated from the following file:

Data Fields