Timer peripheral registers. More...

Detailed Description

Timer peripheral registers.

Note: The TIMER_A timer only has 3 CC channels instead of the 8 channels the TIMER_B has, the memory layout is the same nonetheless.

Definition at line 109 of file msp430_regs_common.h.

Data Fields
REG16	CTL
	timer control

REG16	CCTL [7]
	capture compare channel control

REG16	R
	current counter value

REG16	CCR [7]
	capture compare channel values

The documentation for this struct was generated from the following file:

Data Fields