CSD register structure Version 1.0. More...
CSD register structure Version 1.0.
#include <sdmmc.h>
Data Fields | |
uint32_t | CSD_CRC:8 |
CRC including End bit 1b [7:0]. | |
uint32_t | reserved5:1 |
reserved [8] | |
uint32_t | WP_UPC:1 |
write protection until power cycle [9] | |
uint32_t | FILE_FORMAT:2 |
File format [11:10]. | |
uint32_t | TMP_WRITE_PROTECT:1 |
temporary write protection [12] | |
uint32_t | PERM_WRITE_PROTECT:1 |
permanent write protection [13] | |
uint32_t | COPY:1 |
copy flag [14] | |
uint32_t | FILE_FORMAT_GRP:1 |
File format group [15]. | |
uint32_t | reserved4:5 |
reserved [20:16] | |
uint32_t | WRITE_BL_PARTIAL:1 |
partial blocks for write allowed [21] | |
uint32_t | WRITE_BL_LEN:4 |
max. More... | |
uint32_t | R2W_FACTOR:3 |
write speed factor [28:26] | |
uint32_t | reserved3:2 |
reserved [30:29] | |
uint32_t | WP_GRP_ENABLE:1 |
write protect group enable [31] | |
uint32_t | WP_GRP_SIZE:7 |
write protect group size [38:32] | |
uint32_t | SECTOR_SIZE:7 |
erase sector size [45:39] | |
uint32_t | ERASE_BLK_EN:1 |
erase single block enable [46] | |
uint32_t | C_SIZE_MULT:3 |
device size multiplier [49:47] | |
uint32_t | VDD_W_CURR_MAX:3 |
max. More... | |
uint32_t | VDD_W_CURR_MIN:3 |
max. More... | |
uint32_t | VDD_R_CURR_MAX:3 |
max. More... | |
uint32_t | VDD_R_CURR_MIN:3 |
max. More... | |
uint32_t | C_SIZE:12 |
device size [73:62] | |
uint32_t | reserved2:2 |
reserved [75:74] | |
uint32_t | DSR_IMP:1 |
DSR implemented [76]. | |
uint32_t | READ_BLK_MISALIGN:1 |
read block misalignment [77] | |
uint32_t | WRITE_BLK_MISALIGN:1 |
write block misalignment [78] | |
uint32_t | READ_BL_PARTIAL:1 |
partial blocks for read allowed [79] | |
uint32_t | READ_BL_LEN:4 |
max. More... | |
uint32_t | CCC:12 |
card command classes [95:84] | |
uint32_t | TRAN_SPEED:8 |
max. More... | |
uint32_t | NSAC:8 |
data read access-time-2 in CLK cycles [111:104] | |
uint32_t | TAAC:8 |
data read access-time-1 [119:112] | |
uint32_t | reserved1:6 |
reserved [125:120] | |
uint32_t | CSD_STRUCTURE:2 |
CSD structure [127:126]. | |
uint32_t sdmmc_csd_v1_t::READ_BL_LEN |
uint32_t sdmmc_csd_v1_t::TRAN_SPEED |
uint32_t sdmmc_csd_v1_t::VDD_R_CURR_MAX |
uint32_t sdmmc_csd_v1_t::VDD_R_CURR_MIN |
uint32_t sdmmc_csd_v1_t::VDD_W_CURR_MAX |
uint32_t sdmmc_csd_v1_t::VDD_W_CURR_MIN |
uint32_t sdmmc_csd_v1_t::WRITE_BL_LEN |