cpu_uart.h
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1 /*
2  * SPDX-FileCopyrightText: 2016 Freie Universität Berlin
3  * SPDX-FileCopyrightText: 2017 OTA keys S.A.
4  * SPDX-License-Identifier: LGPL-2.1-only
5  */
6 
7 #pragma once
8 
20 #include <stdint.h>
21 
22 #include "cpu.h"
23 #include "periph/cpu_dma.h"
24 #include "periph/cpu_gpio.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
33 typedef enum {
36 } uart_type_t;
37 
41 #ifndef UART_TXBUF_SIZE
42 #define UART_TXBUF_SIZE (64)
43 #endif
44 
45 #ifndef DOXYGEN
52 #define UART_INVALID_MODE (0x8000000)
53 
58 #define HAVE_UART_PARITY_T
59 typedef enum {
60  UART_PARITY_NONE = 0,
61  UART_PARITY_EVEN = USART_CR1_PCE,
62  UART_PARITY_ODD = (USART_CR1_PCE | USART_CR1_PS),
72 #define HAVE_UART_DATA_BITS_T
73 typedef enum {
76 #if defined(USART_CR1_M1)
77  UART_DATA_BITS_7 = USART_CR1_M1,
78 #else
80 #endif
81  UART_DATA_BITS_8 = 0,
89 #define HAVE_UART_STOP_BITS_T
90 typedef enum {
91  UART_STOP_BITS_1 = 0,
92  UART_STOP_BITS_2 = USART_CR2_STOP_1,
95 #endif /* ndef DOXYGEN */
96 
100 typedef struct {
101  USART_TypeDef *dev;
102  uint32_t rcc_mask;
103  gpio_t rx_pin;
104  gpio_t tx_pin;
105 #ifndef CPU_FAM_STM32F1
108 #endif
109  uint8_t bus;
110  uint8_t irqn;
111 #ifdef MODULE_PERIPH_UART_HW_FC
112  gpio_t cts_pin;
113  gpio_t rts_pin;
114 #ifndef CPU_FAM_STM32F1
115  gpio_af_t cts_af;
116  gpio_af_t rts_af;
117 #endif
118 #endif
119 #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L4) || \
120  defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32G4) || \
121  defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32U5) || \
122  defined(CPU_FAM_STM32MP1) || defined(CPU_FAM_STM32WL)
123  uart_type_t type;
124  uint32_t clk_src;
125 #endif
126 #ifdef MODULE_PERIPH_DMA
127  dma_t dma;
128  uint8_t dma_chan;
129 #endif
130 } uart_conf_t;
131 
132 #ifdef __cplusplus
133 }
134 #endif
135 
DMA CPU specific definitions for the STM32 family.
GPIO CPU definitions for the STM32 family.
uart_type_t
UART hardware module types.
Definition: cpu_uart.h:33
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:35
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:34
gpio_af_t
Override alternative GPIO mode options.
Definition: periph_cpu.h:162
@ UART_PARITY_SPACE
space parity
Definition: periph_cpu.h:503
@ UART_PARITY_NONE
no parity
Definition: periph_cpu.h:499
@ UART_PARITY_EVEN
even parity
Definition: periph_cpu.h:500
@ UART_PARITY_ODD
odd parity
Definition: periph_cpu.h:501
@ UART_PARITY_MARK
mark parity
Definition: periph_cpu.h:502
@ UART_STOP_BITS_2
2 stop bits
Definition: periph_cpu.h:532
@ UART_STOP_BITS_1
1 stop bit
Definition: periph_cpu.h:531
@ UART_DATA_BITS_6
6 data bits
Definition: periph_cpu.h:516
@ UART_DATA_BITS_5
5 data bits
Definition: periph_cpu.h:515
@ UART_DATA_BITS_7
7 data bits
Definition: periph_cpu.h:517
@ UART_DATA_BITS_8
8 data bits
Definition: periph_cpu.h:518
uart_type_t
UART hardware module types.
Definition: periph_cpu.h:533
uart_parity_t
Definition of possible parity modes.
Definition: periph_cpu.h:498
uart_stop_bits_t
Definition of possible stop bits lengths.
Definition: periph_cpu.h:530
#define UART_INVALID_MODE
Invalid UART mode mask.
Definition: periph_cpu.h:489
uart_data_bits_t
Definition of possible data bits lengths in a UART frame.
Definition: periph_cpu.h:514
unsigned dma_t
DMA channel type.
UART device configuration.
Definition: periph_cpu.h:214
gpio_af_t rx_af
alternate function for RX pin
Definition: cpu_uart.h:106
uint32_t rcc_mask
bit in clock enable register
Definition: cpu_uart.h:102
USART_TypeDef * dev
UART device base register address.
Definition: cpu_uart.h:101
gpio_af_t tx_af
alternate function for TX pin
Definition: cpu_uart.h:107