periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2016 Freie Universität Berlin
3  * SPDX-FileCopyrightText: 2016 Inria
4  * SPDX-License-Identifier: LGPL-2.1-only
5  */
6 
7 #pragma once
8 
23 #include <stdint.h>
24 
25 #include "cpu.h"
26 #include "periph_cpu.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
63 #define CLOCK_USE_PLL (1)
64 
65 #if CLOCK_USE_PLL
66 /* edit these values to adjust the PLL output frequency */
67 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
68 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
69 /* generate the actual used core clock frequency */
70 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
71 #else
72 /* edit this value to your needs */
73 #define CLOCK_DIV (1U)
74 /* generate the actual core clock frequency */
75 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
76 #endif
83 static const tc32_conf_t timer_config[] = {
84  { /* Timer 0 - System Clock */
85  .dev = TC3,
86  .irq = TC3_IRQn,
87  .pm_mask = PM_APBCMASK_TC3,
88  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
89 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
90  .gclk_src = SAM0_GCLK_1MHZ,
91 #else
92  .gclk_src = SAM0_GCLK_MAIN,
93 #endif
94  .flags = TC_CTRLA_MODE_COUNT16,
95  },
96  { /* Timer 1 */
97  .dev = TC4,
98  .irq = TC4_IRQn,
99  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
100  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
101 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
102  .gclk_src = SAM0_GCLK_1MHZ,
103 #else
104  .gclk_src = SAM0_GCLK_MAIN,
105 #endif
106  .flags = TC_CTRLA_MODE_COUNT32,
107  }
108 };
109 
110 #define TIMER_0_MAX_VALUE 0xffff
111 
112 /* interrupt function name mapping */
113 #define TIMER_0_ISR isr_tc3
114 #define TIMER_1_ISR isr_tc4
115 
116 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
123 static const uart_conf_t uart_config[] = {
124  {
125  .dev = &SERCOM5->USART,
126  .rx_pin = GPIO_PIN(PB,23),
127  .tx_pin = GPIO_PIN(PB,22),
128 #ifdef MODULE_PERIPH_UART_HW_FC
129  .rts_pin = GPIO_UNDEF,
130  .cts_pin = GPIO_UNDEF,
131 #endif
132  .mux = GPIO_MUX_D,
133  .rx_pad = UART_PAD_RX_3,
134  .tx_pad = UART_PAD_TX_2,
135  .flags = UART_FLAG_NONE,
136  .gclk_src = SAM0_GCLK_MAIN,
137  },
138  {
139  .dev = &SERCOM0->USART,
140  .rx_pin = GPIO_PIN(PA,11),
141  .tx_pin = GPIO_PIN(PA,10),
142 #ifdef MODULE_PERIPH_UART_HW_FC
143  .rts_pin = GPIO_UNDEF,
144  .cts_pin = GPIO_UNDEF,
145 #endif
146  .mux = GPIO_MUX_C,
147  .rx_pad = UART_PAD_RX_3,
148  .tx_pad = UART_PAD_TX_2,
149  .flags = UART_FLAG_NONE,
150  .gclk_src = SAM0_GCLK_MAIN,
151  }
152 };
153 
154 /* interrupt function name mapping */
155 #define UART_0_ISR isr_sercom5
156 #define UART_1_ISR isr_sercom0
157 
158 #define UART_NUMOF ARRAY_SIZE(uart_config)
165 #define PWM_0_EN 1
166 #define PWM_1_EN 1
167 
168 #if PWM_0_EN
169 /* PWM0 channels */
170 static const pwm_conf_chan_t pwm_chan0_config[] = {
171  /* GPIO pin, MUX value, TCC channel */
172  { GPIO_PIN(PA, 8), GPIO_MUX_E, 0 },
173  { GPIO_PIN(PA, 9), GPIO_MUX_E, 1 },
174 };
175 #endif
176 #if PWM_1_EN
177 /* PWM1 channels */
178 static const pwm_conf_chan_t pwm_chan1_config[] = {
179  /* GPIO pin, MUX value, TCC channel */
180  { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
181  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
182 };
183 #endif
184 
185 /* PWM device configuration */
186 static const pwm_conf_t pwm_config[] = {
187 #if PWM_0_EN
188  {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
189 #endif
190 #if PWM_1_EN
191  {TCC_CONFIG(TCC1), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
192 #endif
193 };
194 
195 /* number of devices that are actually defined */
196 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
204 /* ADC Default values */
205 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
206 
207 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
208 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
209 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
210 
211 static const adc_conf_chan_t adc_channels[] = {
212  /* port, pin, muxpos */
213  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
214  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A1 */
215  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A2 */
216  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* A3 */
217  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* A4 */
218  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A5 */
219 };
220 
221 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
228 static const spi_conf_t spi_config[] = {
229  {
230  .dev = &SERCOM4->SPI,
231  .miso_pin = GPIO_PIN(PA, 12),
232  .mosi_pin = GPIO_PIN(PB, 10),
233  .clk_pin = GPIO_PIN(PB, 11),
234  .miso_mux = GPIO_MUX_D,
235  .mosi_mux = GPIO_MUX_D,
236  .clk_mux = GPIO_MUX_D,
237  .miso_pad = SPI_PAD_MISO_0,
238  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
239  .gclk_src = SAM0_GCLK_MAIN,
240  },
241  {
242  .dev = &SERCOM1->SPI,
243  .miso_pin = GPIO_PIN(PA, 19),
244  .mosi_pin = GPIO_PIN(PA, 16),
245  .clk_pin = GPIO_PIN(PA, 17),
246  .miso_mux = GPIO_MUX_C,
247  .mosi_mux = GPIO_MUX_C,
248  .clk_mux = GPIO_MUX_C,
249  .miso_pad = SPI_PAD_MISO_3,
250  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
251  .gclk_src = SAM0_GCLK_MAIN,
252  }
253 };
254 
255 #define SPI_NUMOF ARRAY_SIZE(spi_config)
263 static const i2c_conf_t i2c_config[] = {
264  {
265  .dev = &(SERCOM3->I2CM),
266  .speed = I2C_SPEED_FAST,
267  .scl_pin = GPIO_PIN(PA, 23),
268  .sda_pin = GPIO_PIN(PA, 22),
269  .mux = GPIO_MUX_C,
270  .gclk_src = SAM0_GCLK_MAIN,
271  .flags = I2C_FLAG_NONE
272  }
273 };
274 
275 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
282 #ifndef RTT_FREQUENCY
283 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
284 #endif
285 #define RTT_MIN_OFFSET (10U)
292 static const sam0_common_usb_config_t sam_usbdev_config[] = {
293  {
294  .dm = GPIO_PIN(PA, 24),
295  .dp = GPIO_PIN(PA, 25),
296  .d_mux = GPIO_MUX_G,
297  .device = &USB->DEVICE,
298  .gclk_src = SAM0_GCLK_MAIN,
299  }
300 };
303 #ifdef __cplusplus
304 }
305 #endif
306 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:36
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:82
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:278
@ UART_PAD_RX_3
select pad 3
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition: periph_cpu.h:120
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition: periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition: periph_cpu.h:121
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition: periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218