periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
3  * SPDX-FileCopyrightText: 2015 Hamburg University of Applied Sciences
4  * SPDX-License-Identifier: LGPL-2.1-only
5  */
6 
7 #pragma once
8 
20 /* This board provides an LSE */
21 #ifndef CONFIG_BOARD_HAS_LSE
22 #define CONFIG_BOARD_HAS_LSE 1
23 #endif
24 
25 /* This board provides an HSE */
26 #ifndef CONFIG_BOARD_HAS_HSE
27 #define CONFIG_BOARD_HAS_HSE 1
28 #endif
29 
30 #include "periph_cpu.h"
31 #include "clk_conf.h"
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
48 static const adc_conf_t adc_config[] = {
49  { .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 1 }, /* ADC1_IN1, fast */
50  { .pin = GPIO_PIN(PORT_A, 1), .dev = 0, .chan = 2 }, /* ADC1_IN2, fast */
51  { .pin = GPIO_PIN(PORT_A, 4), .dev = 1, .chan = 1 }, /* ADC2_IN1, fast */
52  { .pin = GPIO_PIN(PORT_B, 0), .dev = 2, .chan = 12 }, /* ADC3_IN12, slow */
53  { .pin = GPIO_PIN(PORT_C, 1), .dev = 1, .chan = 7 }, /* ADC12_IN7, slow */
54  { .pin = GPIO_PIN(PORT_C, 0), .dev = 1, .chan = 6 }, /* ADC12_IN6, slow */
55  { .pin = GPIO_UNDEF, .dev = 0, .chan = 17 }, /* VBAT */
56 };
57 
58 #define VBAT_ADC ADC_LINE(6)
59 #define ADC_NUMOF ARRAY_SIZE(adc_config)
66 static const uart_conf_t uart_config[] = {
67  {
68  .dev = USART2,
69  .rcc_mask = RCC_APB1ENR_USART2EN,
70  .rx_pin = GPIO_PIN(PORT_A, 3),
71  .tx_pin = GPIO_PIN(PORT_A, 2),
72  .rx_af = GPIO_AF7,
73  .tx_af = GPIO_AF7,
74  .bus = APB1,
75  .irqn = USART2_IRQn
76  },
77  {
78  .dev = USART1,
79  .rcc_mask = RCC_APB2ENR_USART1EN,
80  .rx_pin = GPIO_PIN(PORT_A, 10),
81  .tx_pin = GPIO_PIN(PORT_A, 9),
82  .rx_af = GPIO_AF7,
83  .tx_af = GPIO_AF7,
84  .bus = APB2,
85  .irqn = USART1_IRQn
86  },
87  {
88  .dev = USART3,
89  .rcc_mask = RCC_APB1ENR_USART3EN,
90  .rx_pin = GPIO_PIN(PORT_B, 11),
91  .tx_pin = GPIO_PIN(PORT_B, 10),
92  .rx_af = GPIO_AF7,
93  .tx_af = GPIO_AF7,
94  .bus = APB1,
95  .irqn = USART3_IRQn
96  }
97 };
98 
99 #define UART_0_ISR (isr_usart2)
100 #define UART_1_ISR (isr_usart1)
101 #define UART_2_ISR (isr_usart3)
102 
103 #define UART_NUMOF ARRAY_SIZE(uart_config)
110 static const pwm_conf_t pwm_config[] = {
111  {
112  .dev = TIM3,
113  .rcc_mask = RCC_APB1ENR_TIM3EN,
114  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
115  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
116  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
117  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
118  .af = GPIO_AF2,
119  .bus = APB1
120  }
121 };
122 
123 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
130 static const spi_conf_t spi_config[] = {
131  {
132  .dev = SPI1,
133  .mosi_pin = GPIO_PIN(PORT_A, 7),
134  .miso_pin = GPIO_PIN(PORT_A, 6),
135  .sclk_pin = GPIO_PIN(PORT_A, 5),
136  .cs_pin = GPIO_PIN(PORT_A, 4),
137  .mosi_af = GPIO_AF5,
138  .miso_af = GPIO_AF5,
139  .sclk_af = GPIO_AF5,
140  .cs_af = GPIO_AF5,
141  .rccmask = RCC_APB2ENR_SPI1EN,
142  .apbbus = APB2
143  },
144  {
145  .dev = SPI2,
146  .mosi_pin = GPIO_PIN(PORT_B, 15),
147  .miso_pin = GPIO_PIN(PORT_B, 14),
148  .sclk_pin = GPIO_PIN(PORT_B, 13),
149  .cs_pin = GPIO_PIN(PORT_B, 12),
150  .mosi_af = GPIO_AF5,
151  .miso_af = GPIO_AF5,
152  .sclk_af = GPIO_AF5,
153  .cs_af = GPIO_AF5,
154  .rccmask = RCC_APB1ENR_SPI2EN,
155  .apbbus = APB1
156  },
157  {
158  .dev = SPI3,
159  .mosi_pin = GPIO_PIN(PORT_C, 12),
160  .miso_pin = GPIO_PIN(PORT_C, 11),
161  .sclk_pin = GPIO_PIN(PORT_C, 10),
162  .cs_pin = SPI_CS_UNDEF,
163  .mosi_af = GPIO_AF6,
164  .miso_af = GPIO_AF6,
165  .sclk_af = GPIO_AF6,
166  .cs_af = GPIO_AF6,
167  .rccmask = RCC_APB1ENR_SPI3EN,
168  .apbbus = APB1
169  }
170 };
171 
172 #define SPI_NUMOF ARRAY_SIZE(spi_config)
179 static const i2c_conf_t i2c_config[] = {
180  {
181  .dev = I2C1,
182  .speed = I2C_SPEED_NORMAL,
183  .scl_pin = GPIO_PIN(PORT_B, 8),
184  .sda_pin = GPIO_PIN(PORT_B, 9),
185  .scl_af = GPIO_AF4,
186  .sda_af = GPIO_AF4,
187  .bus = APB1,
188  .rcc_mask = RCC_APB1ENR_I2C1EN,
189  .rcc_sw_mask = RCC_CFGR3_I2C1SW,
190  .irqn = I2C1_ER_IRQn
191  },
192  {
193  .dev = I2C3,
194  .speed = I2C_SPEED_NORMAL,
195  .scl_pin = GPIO_PIN(PORT_A, 8),
196  .sda_pin = GPIO_PIN(PORT_B, 5),
197  .scl_af = GPIO_AF3,
198  .sda_af = GPIO_AF8,
199  .bus = APB1,
200  .rcc_mask = RCC_APB1ENR_I2C3EN,
201  .rcc_sw_mask = RCC_CFGR3_I2C3SW,
202  .irqn = I2C3_ER_IRQn
203  }
204 };
205 
206 #define I2C_0_ISR isr_i2c1_er
207 #define I2C_1_ISR isr_i2c3_er
208 
209 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
212 #ifdef __cplusplus
213 }
214 #endif
215 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:247
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
Common configuration for STM32 Timer peripheral based on TIM2, TIM15, and TIM16.
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF6
use alternate function 6
Definition: cpu_gpio.h:107
@ GPIO_AF3
use alternate function 3
Definition: cpu_gpio.h:104
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
ADC device configuration.
Definition: periph_cpu.h:377
gpio_t pin
pin connected to the channel
Definition: periph_cpu.h:287
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218