periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2016 Inria
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 /* This board provides an LSE */
19 #ifndef CONFIG_BOARD_HAS_LSE
20 #define CONFIG_BOARD_HAS_LSE 1
21 #endif
22 
23 /* This board provides an HSE */
24 #ifndef CONFIG_BOARD_HAS_HSE
25 #define CONFIG_BOARD_HAS_HSE 1
26 #endif
27 
28 #include "periph_cpu.h"
29 #include "clk_conf.h"
30 #include "cfg_i2c1_pb8_pb9.h"
31 #include "cfg_timer_tim5.h"
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
41 static const dma_conf_t dma_config[] = {
42  { .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
43  { .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
44 };
45 
46 #define DMA_0_ISR isr_dma2_stream3
47 #define DMA_1_ISR isr_dma2_stream2
48 
49 #define DMA_NUMOF ARRAY_SIZE(dma_config)
56 static const uart_conf_t uart_config[] = {
57  {
58  .dev = USART2,
59  .rcc_mask = RCC_APB1ENR_USART2EN,
60  .rx_pin = GPIO_PIN(PORT_A,3),
61  .tx_pin = GPIO_PIN(PORT_A,2),
62  .rx_af = GPIO_AF7,
63  .tx_af = GPIO_AF7,
64  .bus = APB1,
65  .irqn = USART2_IRQn,
66 #ifdef MODULE_PERIPH_DMA
67  .dma = DMA_STREAM_UNDEF,
68  .dma_chan = UINT8_MAX,
69 #endif
70  },
71  {
72  .dev = USART1,
73  .rcc_mask = RCC_APB2ENR_USART1EN,
74  .rx_pin = GPIO_PIN(PORT_A, 10),
75  .tx_pin = GPIO_PIN(PORT_A, 9),
76  .rx_af = GPIO_AF7,
77  .tx_af = GPIO_AF7,
78  .bus = APB2,
79  .irqn = USART1_IRQn,
80 #ifdef MODULE_PERIPH_DMA
81  .dma = DMA_STREAM_UNDEF,
82  .dma_chan = UINT8_MAX,
83 #endif
84  },
85  {
86  .dev = USART6,
87  .rcc_mask = RCC_APB2ENR_USART6EN,
88  .rx_pin = GPIO_PIN(PORT_A, 12),
89  .tx_pin = GPIO_PIN(PORT_A, 11),
90  .rx_af = GPIO_AF8,
91  .tx_af = GPIO_AF8,
92  .bus = APB2,
93  .irqn = USART6_IRQn,
94 #ifdef MODULE_PERIPH_DMA
95  .dma = DMA_STREAM_UNDEF,
96  .dma_chan = UINT8_MAX,
97 #endif
98  }
99 };
100 
101 /* assign ISR vector names */
102 #define UART_0_ISR isr_usart2
103 #define UART_1_ISR isr_usart1
104 #define UART_2_ISR isr_usart6
105 
106 /* deduct number of defined UART interfaces */
107 #define UART_NUMOF ARRAY_SIZE(uart_config)
113 static const pwm_conf_t pwm_config[] = {
114  {
115  .dev = TIM2,
116  .rcc_mask = RCC_APB1ENR_TIM2EN,
117  .chan = { { .pin = GPIO_PIN(PORT_A, 15) , .cc_chan = 0 },
118  { .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
119  { .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
120  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
121  .af = GPIO_AF1,
122  .bus = APB1
123  },
124  {
125  .dev = TIM3,
126  .rcc_mask = RCC_APB1ENR_TIM3EN,
127  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
128  { .pin = GPIO_PIN(PORT_C, 7) /* D9 */, .cc_chan = 1 },
129  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
130  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
131  .af = GPIO_AF2,
132  .bus = APB1
133  },
134 };
135 
136 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
143 static const spi_conf_t spi_config[] = {
144  {
145  .dev = SPI1,
146  .mosi_pin = GPIO_PIN(PORT_A, 7),
147  .miso_pin = GPIO_PIN(PORT_A, 6),
148  .sclk_pin = GPIO_PIN(PORT_A, 5),
149  .cs_pin = GPIO_PIN(PORT_A, 4),
150  .mosi_af = GPIO_AF5,
151  .miso_af = GPIO_AF5,
152  .sclk_af = GPIO_AF5,
153  .cs_af = GPIO_AF5,
154  .rccmask = RCC_APB2ENR_SPI1EN,
155  .apbbus = APB2,
156 #ifdef MODULE_PERIPH_DMA
157  .tx_dma = 0,
158  .tx_dma_chan = 3,
159  .rx_dma = 1,
160  .rx_dma_chan = 3,
161 #endif
162  }
163 };
164 
165 #define SPI_NUMOF ARRAY_SIZE(spi_config)
178 static const adc_conf_t adc_config[] = {
179  {GPIO_PIN(PORT_A, 0), 0, 0},
180  {GPIO_PIN(PORT_A, 1), 0, 1},
181  {GPIO_PIN(PORT_A, 4), 0, 4},
182  {GPIO_PIN(PORT_B, 0), 0, 8},
183  {GPIO_PIN(PORT_C, 1), 0, 11},
184  {GPIO_PIN(PORT_C, 0), 0, 10},
185  {GPIO_UNDEF, 0, 18}, /* VBAT */
186 };
187 
188 #define VBAT_ADC ADC_LINE(6)
189 #define ADC_NUMOF ARRAY_SIZE(adc_config)
192 #ifdef __cplusplus
193 }
194 #endif
195 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:247
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
ADC device configuration.
Definition: periph_cpu.h:377
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218