periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2014-2016 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
19 #include "periph_cpu.h"
20 #include "clk_conf.h"
21 #include "cfg_timer_tim5.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
31 static const dma_conf_t dma_config[] = {
32  { .stream = 1 }, /* DMA1 Channel 2 - SPI1_RX / USART3_TX */
33  { .stream = 2 }, /* DMA1 Channel 3 - SPI1_TX */
34  { .stream = 6 }, /* DMA1 Channel 7 - USART2_TX */
35  { .stream = 4 }, /* DMA1 Channel 4 - USART1_TX */
36 };
37 
38 #define DMA_0_ISR isr_dma1_channel2
39 #define DMA_1_ISR isr_dma1_channel3
40 #define DMA_2_ISR isr_dma1_channel7
41 #define DMA_3_ISR isr_dma1_channel4
42 
43 #define DMA_NUMOF ARRAY_SIZE(dma_config)
50 static const uart_conf_t uart_config[] = {
51  {
52  .dev = USART2,
53  .rcc_mask = RCC_APB1ENR_USART2EN,
54  .rx_pin = GPIO_PIN(PORT_A, 3),
55  .tx_pin = GPIO_PIN(PORT_A, 2),
56  .rx_af = GPIO_AF7,
57  .tx_af = GPIO_AF7,
58  .bus = APB1,
59  .irqn = USART2_IRQn,
60 #ifdef MODULE_PERIPH_DMA
61  .dma = 2,
62  .dma_chan = 2
63 #endif
64  },
65  {
66  .dev = USART1,
67  .rcc_mask = RCC_APB2ENR_USART1EN,
68  .rx_pin = GPIO_PIN(PORT_A, 10),
69  .tx_pin = GPIO_PIN(PORT_A, 9),
70  .rx_af = GPIO_AF7,
71  .tx_af = GPIO_AF7,
72  .bus = APB2,
73  .irqn = USART1_IRQn,
74 #ifdef MODULE_PERIPH_DMA
75  .dma = 3,
76  .dma_chan = 2
77 #endif
78  },
79  {
80  .dev = USART3,
81  .rcc_mask = RCC_APB1ENR_USART3EN,
82  .rx_pin = GPIO_PIN(PORT_C, 11),
83  .tx_pin = GPIO_PIN(PORT_C, 10),
84  .rx_af = GPIO_AF7,
85  .tx_af = GPIO_AF7,
86  .bus = APB1,
87  .irqn = USART3_IRQn,
88 #ifdef MODULE_PERIPH_DMA
89  .dma = 0,
90  .dma_chan = 2
91 #endif
92  },
93 };
94 
95 #define UART_0_ISR (isr_usart2)
96 #define UART_1_ISR (isr_usart1)
97 #define UART_2_ISR (isr_usart3)
98 
99 #define UART_NUMOF ARRAY_SIZE(uart_config)
106 static const pwm_conf_t pwm_config[] = {
107  {
108  .dev = TIM2,
109  .rcc_mask = RCC_APB1ENR_TIM2EN,
110  .chan = { { .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
111  { .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
112  { .pin = GPIO_UNDEF, .cc_chan = 0 },
113  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
114  .af = GPIO_AF1,
115  .bus = APB1
116  },
117  {
118  .dev = TIM3,
119  .rcc_mask = RCC_APB1ENR_TIM3EN,
120  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
121  { .pin = GPIO_PIN(PORT_C, 7) /* D9 */, .cc_chan = 1 },
122  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
123  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
124  .af = GPIO_AF2,
125  .bus = APB1
126  }
127 };
128 
129 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
136 static const spi_conf_t spi_config[] = {
137  {
138  .dev = SPI1,
139  .mosi_pin = GPIO_PIN(PORT_A, 7),
140  .miso_pin = GPIO_PIN(PORT_A, 6),
141  .sclk_pin = GPIO_PIN(PORT_A, 5),
142  .cs_pin = SPI_CS_UNDEF,
143  .mosi_af = GPIO_AF5,
144  .miso_af = GPIO_AF5,
145  .sclk_af = GPIO_AF5,
146  .cs_af = GPIO_AF5,
147  .rccmask = RCC_APB2ENR_SPI1EN,
148  .apbbus = APB2,
149 #ifdef MODULE_PERIPH_DMA
150  .tx_dma = 1,
151  .tx_dma_chan = 1,
152  .rx_dma = 0,
153  .rx_dma_chan = 1,
154 #endif
155  }
156 };
157 
158 #define SPI_NUMOF ARRAY_SIZE(spi_config)
165 static const i2c_conf_t i2c_config[] = {
166  {
167  .dev = I2C1,
168  .speed = I2C_SPEED_NORMAL,
169  .scl_pin = GPIO_PIN(PORT_B, 8),
170  .sda_pin = GPIO_PIN(PORT_B, 9),
171  .scl_af = GPIO_AF4,
172  .sda_af = GPIO_AF4,
173  .bus = APB1,
174  .rcc_mask = RCC_APB1ENR_I2C1EN,
175  .clk = CLOCK_APB1,
176  .irqn = I2C1_EV_IRQn
177  },
178  {
179  .dev = I2C2,
180  .speed = I2C_SPEED_NORMAL,
181  .scl_pin = GPIO_PIN(PORT_B, 10),
182  .sda_pin = GPIO_PIN(PORT_B, 11),
183  .scl_af = GPIO_AF4,
184  .sda_af = GPIO_AF4,
185  .bus = APB1,
186  .rcc_mask = RCC_APB1ENR_I2C2EN,
187  .clk = CLOCK_APB1,
188  .irqn = I2C2_EV_IRQn
189  }
190 };
191 
192 #define I2C_0_ISR isr_i2c1_ev
193 #define I2C_1_ISR isr_i2c2_ev
194 
195 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
202 static const adc_conf_t adc_config[] = {
203  { GPIO_PIN(PORT_A, 0), 0 },
204  { GPIO_PIN(PORT_A, 1), 1 },
205  { GPIO_PIN(PORT_A, 4), 4 },
206  { GPIO_PIN(PORT_B, 0), 8 },
207  { GPIO_PIN(PORT_C, 1), 11 },
208  { GPIO_PIN(PORT_C, 0), 10 },
209 };
210 
211 #define ADC_NUMOF ARRAY_SIZE(adc_config)
218 static const dac_conf_t dac_config[] = {
219  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
220  { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
221 };
222 
223 #define DAC_NUMOF ARRAY_SIZE(dac_config)
226 #ifdef __cplusplus
227 }
228 #endif
229 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:247
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:249
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:377
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218