periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2020 Inria
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 /* Add specific clock configuration (HSE, LSE) for this board here */
19 #ifndef CONFIG_BOARD_HAS_LSE
20 #define CONFIG_BOARD_HAS_LSE 1
21 #endif
22 
23 #include "periph_cpu.h"
24 #include "clk_conf.h"
25 #include "cfg_i2c1_pb8_pb9.h"
26 #include "cfg_rtt_default.h"
27 #include "cfg_timer_tim5.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
37 static const uart_conf_t uart_config[] = {
38  {
39  .dev = LPUART1,
40  .rcc_mask = RCC_APB1ENR2_LPUART1EN,
41  .rx_pin = GPIO_PIN(PORT_G, 8),
42  .tx_pin = GPIO_PIN(PORT_G, 7),
43  .rx_af = GPIO_AF8,
44  .tx_af = GPIO_AF8,
45  .bus = APB12,
46  .irqn = LPUART1_IRQn,
47  .type = STM32_LPUART,
48  .clk_src = 0, /* Use APB clock */
49  },
50  { /* Connected to Arduino D0/D1 */
51  .dev = USART3,
52  .rcc_mask = RCC_APB1ENR1_USART3EN,
53  .rx_pin = GPIO_PIN(PORT_D, 9),
54  .tx_pin = GPIO_PIN(PORT_D, 8),
55  .rx_af = GPIO_AF7,
56  .tx_af = GPIO_AF7,
57  .bus = APB1,
58  .irqn = USART3_IRQn,
59  .type = STM32_USART,
60  .clk_src = 0, /* Use APB clock */
61  },
62 };
63 
64 #define UART_0_ISR (isr_lpuart1)
65 #define UART_1_ISR (isr_usart3)
66 
67 #define UART_NUMOF ARRAY_SIZE(uart_config)
74 static const spi_conf_t spi_config[] = {
75  {
76  .dev = SPI1,
77  .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
78  .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
79  .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
80  .cs_pin = GPIO_UNDEF,
81  .mosi_af = GPIO_AF5,
82  .miso_af = GPIO_AF5,
83  .sclk_af = GPIO_AF5,
84  .cs_af = GPIO_AF5,
85  .rccmask = RCC_APB2ENR_SPI1EN,
86  .apbbus = APB2,
87  },
88 };
89 
90 #define SPI_NUMOF ARRAY_SIZE(spi_config)
108 static const pwm_conf_t pwm_config[] = {
109  {
110  .dev = TIM2,
111  .rcc_mask = RCC_APB1ENR1_TIM2EN,
112  .chan = { { .pin = GPIO_PIN(PORT_A, 0) /* CN10 D32 */, .cc_chan = 0},
113  { .pin = GPIO_PIN(PORT_A, 1) /* CN10 A8 */, .cc_chan = 1},
114  { .pin = GPIO_PIN(PORT_A, 2) /* CN9 A1 */, .cc_chan = 2},
115  { .pin = GPIO_PIN(PORT_A, 3) /* CN9 A0 */, .cc_chan = 3} },
116  .af = GPIO_AF1,
117  .bus = APB1
118  },
119  {
120  .dev = TIM3,
121  .rcc_mask = RCC_APB1ENR1_TIM3EN,
122  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* CN7 D25 */, .cc_chan = 0},
123  { .pin = GPIO_PIN(PORT_B, 5) /* CN7 D22 */, .cc_chan = 1},
124  { .pin = GPIO_PIN(PORT_B, 0) /* CN9 A3 */, .cc_chan = 2},
125  { .pin = GPIO_PIN(PORT_B, 1) /* CN10 A6 */, .cc_chan = 3} },
126  .af = GPIO_AF2,
127  .bus = APB1
128  },
129  {
130  .dev = TIM4,
131  .rcc_mask = RCC_APB1ENR1_TIM4EN,
132  .chan = { { .pin = GPIO_PIN(PORT_D, 12) /* CN7 D19 */, .cc_chan = 0},
133  { .pin = GPIO_PIN(PORT_B, 7) /* Blue LD2 */, .cc_chan = 1},
134  { .pin = GPIO_PIN(PORT_D, 14) /* CN7 D10 */, .cc_chan = 2},
135  { .pin = GPIO_PIN(PORT_D, 15) /* CN7 D9 */, .cc_chan = 3} },
136  .af = GPIO_AF2,
137  .bus = APB1
138  },
139 };
140 
141 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
142 
145 #ifdef __cplusplus
146 }
147 #endif
148 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_G
port G
Definition: periph_cpu.h:52
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:38
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:37
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218