periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2024 TU Dresden
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 /* Add specific clock configuration (HSE, LSE) for this board here */
19 #ifndef CONFIG_BOARD_HAS_LSE
20 #define CONFIG_BOARD_HAS_LSE 1
21 #endif
22 
23 #include "cfg_timer_tim5.h"
24 #include "cfg_usb_otg_fs_u5.h"
25 #include "clk_conf.h"
26 #include "periph_cpu.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
36 static const uart_conf_t uart_config[] = {
37  {
38  .dev = USART1,
39  .rcc_mask = RCC_APB2ENR_USART1EN,
40  .rx_pin = GPIO_PIN(PORT_A, 10),
41  .tx_pin = GPIO_PIN(PORT_A, 9),
42  .rx_af = GPIO_AF7,
43  .tx_af = GPIO_AF7,
44  .bus = APB2,
45  .irqn = USART1_IRQn,
46  .type = STM32_USART,
47  .clk_src = 0, /* Use APB clock */
48  },
49  {
50  .dev = LPUART1,
51  .rcc_mask = RCC_APB3ENR_LPUART1EN,
52  .rx_pin = GPIO_PIN(PORT_G, 8),
53  .tx_pin = GPIO_PIN(PORT_G, 7),
54  .rx_af = GPIO_AF8,
55  .tx_af = GPIO_AF8,
56  .bus = APB3,
57  .irqn = LPUART1_IRQn,
58  .type = STM32_LPUART,
59  .clk_src = 0, /* Use APB clock */
60  },
61 };
62 
63 #define UART_0_ISR (isr_usart1)
64 #define UART_1_ISR (isr_lpuart1)
65 
66 #define UART_NUMOF ARRAY_SIZE(uart_config)
73 static const spi_conf_t spi_config[] = {
74  {
75  .dev = SPI1,
76  .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
77  .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
78  .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
79  .cs_pin = GPIO_UNDEF,
80  .mosi_af = GPIO_AF5,
81  .miso_af = GPIO_AF5,
82  .sclk_af = GPIO_AF5,
83  .cs_af = GPIO_AF5,
84  .rccmask = RCC_APB2ENR_SPI1EN,
85  .apbbus = APB2,
86  },
87 };
88 
89 #define SPI_NUMOF ARRAY_SIZE(spi_config)
96 static const i2c_conf_t i2c_config[] = {
97  {
98  .dev = I2C1,
99  .speed = I2C_SPEED_NORMAL,
100  .scl_pin = GPIO_PIN(PORT_B, 8),
101  .sda_pin = GPIO_PIN(PORT_B, 9),
102  .scl_af = GPIO_AF4,
103  .sda_af = GPIO_AF4,
104  .bus = APB1,
105  .rcc_mask = RCC_APB1ENR1_I2C1EN,
106  .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
107  .irqn = I2C1_ER_IRQn,
108  },
109  {
110  .dev = I2C2,
111  .speed = I2C_SPEED_NORMAL,
112  .scl_pin = GPIO_PIN(PORT_F, 1),
113  .sda_pin = GPIO_PIN(PORT_F, 0),
114  .scl_af = GPIO_AF4,
115  .sda_af = GPIO_AF4,
116  .bus = APB1,
117  .rcc_mask = RCC_APB1ENR1_I2C2EN,
118  .rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
119  .irqn = I2C2_ER_IRQn,
120  },
121 };
122 
123 #define I2C_0_ISR isr_i2c1_er
124 #define I2C_1_ISR isr_i2c2_er
125 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
143 static const pwm_conf_t pwm_config[] = {
144  { .dev = TIM2,
145  .rcc_mask = RCC_APB1ENR1_TIM2EN,
146  .chan = { { .pin = GPIO_PIN(PORT_A, 0) /* CN10 D32 */, .cc_chan = 0 },
147  { .pin = GPIO_PIN(PORT_A, 1) /* CN10 A8 */, .cc_chan = 1 },
148  { .pin = GPIO_PIN(PORT_A, 2) /* CN9 A1 */, .cc_chan = 2 },
149  { .pin = GPIO_PIN(PORT_A, 3) /* CN9 A0 */, .cc_chan = 3 } },
150  .af = GPIO_AF1,
151  .bus = APB1 },
152  { .dev = TIM3,
153  .rcc_mask = RCC_APB1ENR1_TIM3EN,
154  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* CN7 D25 */, .cc_chan = 0 },
155  { .pin = GPIO_PIN(PORT_B, 5) /* CN7 D22 */, .cc_chan = 1 },
156  { .pin = GPIO_PIN(PORT_B, 0) /* CN9 A3 */, .cc_chan = 2 },
157  { .pin = GPIO_PIN(PORT_B, 1) /* CN10 A6 */, .cc_chan = 3 } },
158  .af = GPIO_AF2,
159  .bus = APB1 },
160  { .dev = TIM4,
161  .rcc_mask = RCC_APB1ENR1_TIM4EN,
162  .chan = { { .pin = GPIO_PIN(PORT_D, 12) /* CN7 D19 */, .cc_chan = 0 },
163  { .pin = GPIO_PIN(PORT_B, 7) /* Blue LD2 */, .cc_chan = 1 },
164  { .pin = GPIO_PIN(PORT_D, 14) /* CN7 D10 */, .cc_chan = 2 },
165  { .pin = GPIO_PIN(PORT_D, 15) /* CN7 D9 */, .cc_chan = 3 } },
166  .af = GPIO_AF2,
167  .bus = APB1 },
168 };
169 
170 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
171 
174 #ifdef __cplusplus
175 }
176 #endif
177 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_G
port G
Definition: periph_cpu.h:52
@ PORT_F
port F
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
Common configuration for STM32 Timer peripheral based on TIM5.
Common configuration for STM32 OTG FS peripheral for U5 family.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:38
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:37
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218