periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2014 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 /* This board provides an HSE */
19 #ifndef CONFIG_BOARD_HAS_HSE
20 #define CONFIG_BOARD_HAS_HSE 1
21 #endif
22 
23 #include "periph_cpu.h"
24 #include "clk_conf.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 static const dac_conf_t dac_config[] = {
35  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 }
36 };
37 
38 #define DAC_NUMOF ARRAY_SIZE(dac_config)
45 static const timer_conf_t timer_config[] = {
46  {
47  .dev = TIM2,
48  .max = 0xffffffff,
49  .rcc_mask = RCC_APB1ENR_TIM2EN,
50  .bus = APB1,
51  .irqn = TIM2_IRQn
52  }
53 };
54 
55 #define TIMER_0_ISR isr_tim2
56 
57 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
64 static const uart_conf_t uart_config[] = {
65  {
66  .dev = USART1,
67  .rcc_mask = RCC_APB2ENR_USART1EN,
68  .rx_pin = GPIO_PIN(PORT_A, 10),
69  .tx_pin = GPIO_PIN(PORT_A, 9),
70  .rx_af = GPIO_AF7,
71  .tx_af = GPIO_AF7,
72  .bus = APB2,
73  .irqn = USART1_IRQn
74  },
75  {
76  .dev = USART2,
77  .rcc_mask = RCC_APB1ENR_USART2EN,
78  .rx_pin = GPIO_PIN(PORT_D, 6),
79  .tx_pin = GPIO_PIN(PORT_D, 5),
80  .rx_af = GPIO_AF7,
81  .tx_af = GPIO_AF7,
82  .bus = APB1,
83  .irqn = USART2_IRQn
84  },
85  {
86  .dev = USART3,
87  .rcc_mask = RCC_APB1ENR_USART3EN,
88  .rx_pin = GPIO_PIN(PORT_D, 9),
89  .tx_pin = GPIO_PIN(PORT_D, 8),
90  .rx_af = GPIO_AF7,
91  .tx_af = GPIO_AF7,
92  .bus = APB1,
93  .irqn = USART3_IRQn
94  }
95 };
96 
97 #define UART_0_ISR (isr_usart1)
98 #define UART_1_ISR (isr_usart2)
99 #define UART_2_ISR (isr_usart3)
100 
101 #define UART_NUMOF ARRAY_SIZE(uart_config)
108 static const pwm_conf_t pwm_config[] = {
109  {
110  .dev = TIM3,
111  .rcc_mask = RCC_APB1ENR_TIM3EN,
112  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
113  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
114  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
115  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
116  .af = GPIO_AF2,
117  .bus = APB1
118  },
119  {
120  .dev = TIM4,
121  .rcc_mask = RCC_APB1ENR_TIM4EN,
122  .chan = { { .pin = GPIO_PIN(PORT_D, 12), .cc_chan = 0},
123  { .pin = GPIO_PIN(PORT_D, 13), .cc_chan = 1},
124  { .pin = GPIO_PIN(PORT_D, 14), .cc_chan = 2},
125  { .pin = GPIO_PIN(PORT_D, 15), .cc_chan = 3} },
126  .af = GPIO_AF2,
127  .bus = APB1
128  }
129 };
130 
131 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
138 static const spi_conf_t spi_config[] = {
139  {
140  .dev = SPI1,
141  .mosi_pin = GPIO_PIN(PORT_A, 7),
142  .miso_pin = GPIO_PIN(PORT_A, 6),
143  .sclk_pin = GPIO_PIN(PORT_A, 5),
144  .cs_pin = SPI_CS_UNDEF,
145  .mosi_af = GPIO_AF5,
146  .miso_af = GPIO_AF5,
147  .sclk_af = GPIO_AF5,
148  .cs_af = GPIO_AF5,
149  .rccmask = RCC_APB2ENR_SPI1EN,
150  .apbbus = APB2
151  },
152  {
153  .dev = SPI3,
154  .mosi_pin = GPIO_PIN(PORT_C, 12),
155  .miso_pin = GPIO_PIN(PORT_C, 11),
156  .sclk_pin = GPIO_PIN(PORT_C, 10),
157  .cs_pin = GPIO_PIN(PORT_A, 15),
158  .mosi_af = GPIO_AF6,
159  .miso_af = GPIO_AF6,
160  .sclk_af = GPIO_AF6,
161  .cs_af = GPIO_AF6,
162  .rccmask = RCC_APB1ENR_SPI3EN,
163  .apbbus = APB1
164  }
165 };
166 
167 #define SPI_NUMOF ARRAY_SIZE(spi_config)
174 static const i2c_conf_t i2c_config[] = {
175  {
176  .dev = I2C1,
177  .speed = I2C_SPEED_NORMAL,
178  .scl_pin = GPIO_PIN(PORT_B, 6),
179  .sda_pin = GPIO_PIN(PORT_B, 7),
180  .scl_af = GPIO_AF4,
181  .sda_af = GPIO_AF4,
182  .bus = APB1,
183  .rcc_mask = RCC_APB1ENR_I2C1EN,
184  .rcc_sw_mask = RCC_CFGR3_I2C1SW,
185  .irqn = I2C1_ER_IRQn
186  },
187  {
188  .dev = I2C2,
189  .speed = I2C_SPEED_NORMAL,
190  .scl_pin = GPIO_PIN(PORT_F, 1),
191  .sda_pin = GPIO_PIN(PORT_F, 0),
192  .scl_af = GPIO_AF4,
193  .sda_af = GPIO_AF4,
194  .bus = APB1,
195  .rcc_mask = RCC_APB1ENR_I2C2EN,
196  .rcc_sw_mask = RCC_CFGR3_I2C2SW,
197  .irqn = I2C2_ER_IRQn
198  }
199 };
200 
201 #define I2C_0_ISR isr_i2c1_er
202 #define I2C_1_ISR isr_i2c2_er
203 
204 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
207 #ifdef __cplusplus
208 }
209 #endif
210 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_F
port F
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:36
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:249
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF6
use alternate function 6
Definition: cpu_gpio.h:107
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218