cfg_usbdev_default.h
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1 /*
2  * SPDX-FileCopyrightText: 2023 Gunar Schorcht <gunar@schorcht.net>
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "vendor/usbdev_gd32v.h"
19 #include "usbdev_synopsys_dwc2.h"
20 
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24 
32 #define DWC2_USB_OTG_FS_ENABLED
33 
38  {
39  .periph = USB_OTG_FS_PERIPH_BASE,
40  .type = DWC2_USB_OTG_FS,
42  .rcu_mask = RCU_AHBEN_USBFSEN_Msk,
43  .irqn = USBFS_IRQn,
44  .bus = AHB,
45  }
46 };
47 
51 #define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
54 #ifdef __cplusplus
55 }
56 #endif
57 
static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[]
Common USB OTG FS configuration.
@ AHB
Advanced High-performance Bus.
Definition: periph_cpu.h:77
USB OTG configuration.
uintptr_t periph
USB peripheral base address.
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.
@ DWC2_USB_OTG_PHY_BUILTIN
on-chip FS PHY
@ DWC2_USB_OTG_FS
Full speed peripheral.