cfg_spi_default.h
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1 /*
2  * SPDX-FileCopyrightText: 2016 Kees Bakker, SODAQ
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include <stdint.h>
19 
20 #include "cpu.h"
21 #include "periph_cpu.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
31 static const spi_conf_t spi_config[] = {
32  {
33  .dev = &SERCOM3->SPI,
34  .miso_pin = GPIO_PIN(PA, 22),
35  .mosi_pin = GPIO_PIN(PA, 20),
36  .clk_pin = GPIO_PIN(PA, 21),
37  .miso_mux = GPIO_MUX_C,
38  .mosi_mux = GPIO_MUX_D,
39  .clk_mux = GPIO_MUX_D,
40  .miso_pad = SPI_PAD_MISO_0,
41  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
42  .gclk_src = SAM0_GCLK_MAIN,
43 #ifdef MODULE_PERIPH_DMA
44  .tx_trigger = SERCOM3_DMAC_ID_TX,
45  .rx_trigger = SERCOM3_DMAC_ID_RX,
46 #endif
47  },
48 };
49 
50 #define SPI_NUMOF ARRAY_SIZE(spi_config)
53 #ifdef __cplusplus
54 }
55 #endif
56 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const spi_conf_t spi_config[]
Default SPI device configuration.
@ PA
port A
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337