Internal definitions for ADS101x/111x devices. More...
Internal definitions for ADS101x/111x devices.
Definition in file ads1x1x_internal.h.
#include <stdint.h>
Include dependency graph for ads1x1x_internal.h:
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Macros | |
| #define | ADS1X1X_CONF_OS_CONV_MASK (1 << 7) |
| ADS101x/111x Operational Status. More... | |
| #define | ADS1X1X_ALERT_MASK |
| ADS101x 12-bit resolution. More... | |
Functions | |
| static uint16_t | _ads1x1x_get_pga_voltage (uint8_t pga) |
| Get the voltage reference for a given PGA setting. More... | |
ADS101x/111x register addresses | |
| #define | ADS1X1X_CONV_RES_ADDR (0) |
| Conversion register. | |
| #define | ADS1X1X_CONF_ADDR (1) |
| Configuration register. | |
| #define | ADS1X1X_LOW_LIMIT_ADDR (2) |
| Low limit register. | |
| #define | ADS1X1X_HIGH_LIMIT_ADDR (3) |
| High limit register. | |
ADS101x/111x mux settings | |
Supports both single mode and differential. This has no effect on ADS1013-4 and ADS1113-4. | |
| #define | ADS1X1X_MUX_MASK ((1 << 6) | (1 << 5) | (1 << 4)) |
| Mask for MUX bits. | |
| #define | ADS1X1X_AIN0_DIFFM_AIN1 ((0 << 6) | (0 << 5) | (0 << 4)) |
| Differential AIN0 - AIN1 (default) | |
| #define | ADS1X1X_AIN0_DIFFM_AIN3 ((0 << 6) | (0 << 5) | (1 << 4)) |
| Differential AIN0 - AIN3. | |
| #define | ADS1X1X_AIN1_DIFFM_AIN3 ((0 << 6) | (1 << 5) | (0 << 4)) |
| Differential AIN1 - AIN3. | |
| #define | ADS1X1X_AIN2_DIFFM_AIN3 ((0 << 6) | (1 << 5) | (1 << 4)) |
| Differential AIN2 - AIN3. | |
| #define | ADS1X1X_AIN0_SINGM ((1 << 6) | (0 << 5) | (0 << 4)) |
| Single-ended AIN0. | |
| #define | ADS1X1X_AIN1_SINGM ((1 << 6) | (0 << 5) | (1 << 4)) |
| Single-ended AIN1. | |
| #define | ADS1X1X_AIN2_SINGM ((1 << 6) | (1 << 5) | (0 << 4)) |
| Single-ended AIN2. | |
| #define | ADS1X1X_AIN3_SINGM ((1 << 6) | (1 << 5) | (1 << 4)) |
| Single-ended AIN3. | |
ADS101x/111x programmable gain | |
Sets the full-scale range (max voltage value). This has no effect on ADS1013 and ADS1113 (both use 2.048V FSR). | |
| #define | ADS1X1X_PGA_MASK ((1 << 3) | (1 << 2) | (1 << 1)) |
| Mask for PGA bits. | |
| #define | ADS1X1X_PGA_FSR_6V144 ((0 << 3) | (0 << 2) | (0 << 1)) |
| +/-6.144V | |
| #define | ADS1X1X_PGA_FSR_4V096 ((0 << 3) | (0 << 2) | (1 << 1)) |
| +/-4.096V | |
| #define | ADS1X1X_PGA_FSR_2V048 ((0 << 3) | (1 << 2) | (0 << 1)) |
| +/-2.048V (default) | |
| #define | ADS1X1X_PGA_FSR_1V024 ((0 << 3) | (1 << 2) | (1 << 1)) |
| +/-1.024V | |
| #define | ADS1X1X_PGA_FSR_0V512 ((1 << 3) | (0 << 2) | (0 << 1)) |
| +/-0.512V | |
| #define | ADS1X1X_PGA_FSR_0V256 ((1 << 3) | (0 << 2) | (1 << 1)) |
| +/-0.256V | |
ADS101x/111x operating modes | |
| #define | ADS1X1X_MODE_MASK (1 << 0) |
| Mask for MODE bit. | |
| #define | ADS1X1X_MODE_SINGLE (1 << 0) |
| Single-shot / power-down. | |
| #define | ADS1X1X_MODE_CONTINUOUS (0 << 0) |
| Continuous conversion. | |
ADS101x/ADS111x Data Rate Settings | |
Register bit definitions for configuring data rate (samples per second). | |
| #define | ADS1X1X_DATAR_UNDEF (0xFF) |
| Undefined / invalid data rate. | |
| #define | ADS1X1X_DATAR_MASK ((1 << 7) | (1 << 6) | (1 << 5)) |
| Bit mask for data rate field. | |
Comparator mode | |
| #define | ADS1X1X_COMP_MODE_MASK (1 << 4) |
| Mask for COMP_MODE bit. | |
| #define | ADS1X1X_COMP_MODE_TRADITIONAL (0 << 4) |
| Traditional comparator (default) | |
| #define | ADS1X1X_COMP_MODE_WINDOW (1 << 4) |
| Window comparator. | |
Comparator polarity | |
| #define | ADS1X1X_COMP_POLARITY_MASK (1 << 3) |
| Mask for COMP_POLARITY bit. | |
| #define | ADS1X1X_COMP_POLARITY_LOW (0 << 3) |
| Active low (default) | |
| #define | ADS1X1X_COMP_POLARITY_HIGH (1 << 3) |
| Active high. | |
Comparator latch | |
| #define | ADS1X1X_COMP_LATCH_MASK (1 << 2) |
| Mask for COMP_LATCH bit. | |
| #define | ADS1X1X_COMP_LATCH_DISABLE (0 << 2) |
| Non-latching (default) | |
| #define | ADS1X1X_COMP_LATCH_ENABLE (1 << 2) |
| Latching until read. | |
Comparator queue | |
| #define | ADS1X1X_COMP_QUEUE_MASK ((1 << 1) | (1 << 0)) |
| Mask for COMP_QUEUE bits. | |
| #define | ADS1X1X_COMP_QUEUE_1 ((0 << 1) | (0 << 0)) |
| Assert after 1 conversion. | |
| #define | ADS1X1X_COMP_QUEUE_2 ((0 << 1) | (1 << 0)) |
| Assert after 2 conversions. | |
| #define | ADS1X1X_COMP_QUEUE_4 ((1 << 1) | (0 << 0)) |
| Assert after 4 conversions. | |
| #define | ADS1X1X_COMP_QUEUE_DISABLE ((1 << 1) | (1 << 0)) |
| Disable comparator (default) | |
ADS101x/111x bit resolution | |
| #define | ADS1X1X_BITS_RES_UNDEF (0) |
| Undefined resolution. | |
| #define ADS1X1X_ALERT_MASK |
ADS101x 12-bit resolution.
ADS111x 16-bit resolution
Mask for all alert-related configuration bits (comparator mode, polarity, latch, queue).
Definition at line 196 of file ads1x1x_internal.h.
| #define ADS1X1X_CONF_OS_CONV_MASK (1 << 7) |
ADS101x/111x Operational Status.
Operational status bit
Definition at line 42 of file ads1x1x_internal.h.
|
inlinestatic |
Get the voltage reference for a given PGA setting.
| [in] | pga | PGA setting |
Definition at line 206 of file ads1x1x_internal.h.