periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
9 #pragma once
10 
21 /* This board provides an HSE */
22 #ifndef CONFIG_BOARD_HAS_HSE
23 #define CONFIG_BOARD_HAS_HSE 1
24 #endif
25 
26 /* The HSE provides a 16MHz clock */
27 #ifndef CONFIG_CLOCK_HSE
28 #define CONFIG_CLOCK_HSE MHZ(16)
29 #endif
30 
31 #include "periph_cpu.h"
32 #include "clk_conf.h"
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
42 static const dma_conf_t dma_config[] = {
43  { .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
44  { .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
45 };
46 
47 #define DMA_0_ISR isr_dma2_stream3
48 #define DMA_1_ISR isr_dma2_stream2
49 
50 #define DMA_NUMOF ARRAY_SIZE(dma_config)
57 static const timer_conf_t timer_config[] = {
58  {
59  .dev = TIM2,
60  .max = 0xffffffff,
61  .rcc_mask = RCC_APB1ENR_TIM2EN,
62  .bus = APB1,
63  .irqn = TIM2_IRQn
64  },
65  {
66  .dev = TIM5,
67  .max = 0xffffffff,
68  .rcc_mask = RCC_APB1ENR_TIM5EN,
69  .bus = APB1,
70  .irqn = TIM5_IRQn
71  }
72 };
73 
74 #define TIMER_0_ISR isr_tim2
75 #define TIMER_1_ISR isr_tim5
76 
77 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
84 static const pwm_conf_t pwm_config[] = {
85  {
86  .dev = TIM11,
87  .rcc_mask = RCC_APB2ENR_TIM11EN,
88  .chan = { { .pin = GPIO_PIN(PORT_B, 9), .cc_chan = 0 },
89  { .pin = GPIO_UNDEF, .cc_chan = 0 },
90  { .pin = GPIO_UNDEF, .cc_chan = 0 },
91  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
92  .af = GPIO_AF3,
93  .bus = APB2
94  }
95 };
96 
97 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
107 static const adc_conf_t adc_config[] = {
108  {GPIO_PIN(PORT_B, 0), 0, 8},
109  {GPIO_PIN(PORT_B, 1), 0, 9},
110  {GPIO_UNDEF, 0, 18}, /* VBAT */
111 };
112 
113 #define VBAT_ADC ADC_LINE(2)
114 #define ADC_NUMOF ARRAY_SIZE(adc_config)
121 static const dac_conf_t dac_config[] = {
122  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
123  { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
124 };
125 
126 #define DAC_NUMOF ARRAY_SIZE(dac_config)
133 static const uart_conf_t uart_config[] = {
134  {
135  .dev = USART2,
136  .rcc_mask = RCC_APB1ENR_USART2EN,
137  .rx_pin = GPIO_PIN(PORT_A, 3),
138  .tx_pin = GPIO_PIN(PORT_A, 2),
139  .rx_af = GPIO_AF7,
140  .tx_af = GPIO_AF7,
141  .bus = APB1,
142  .irqn = USART2_IRQn,
143 #ifdef MODULE_PERIPH_DMA
144  .dma = DMA_STREAM_UNDEF,
145  .dma_chan = UINT8_MAX,
146 #endif
147  },
148  {
149  .dev = USART1,
150  .rcc_mask = RCC_APB2ENR_USART1EN,
151  .rx_pin = GPIO_PIN(PORT_A, 10),
152  .tx_pin = GPIO_PIN(PORT_A, 9),
153  .rx_af = GPIO_AF7,
154  .tx_af = GPIO_AF7,
155  .bus = APB2,
156  .irqn = USART1_IRQn,
157 #ifdef MODULE_PERIPH_DMA
158  .dma = DMA_STREAM_UNDEF,
159  .dma_chan = UINT8_MAX,
160 #endif
161  },
162  {
163  .dev = USART3,
164  .rcc_mask = RCC_APB1ENR_USART3EN,
165  .rx_pin = GPIO_PIN(PORT_D, 9),
166  .tx_pin = GPIO_PIN(PORT_D, 8),
167  .rx_af = GPIO_AF7,
168  .tx_af = GPIO_AF7,
169  .bus = APB1,
170  .irqn = USART3_IRQn,
171 #ifdef MODULE_PERIPH_DMA
172  .dma = DMA_STREAM_UNDEF,
173  .dma_chan = UINT8_MAX,
174 #endif
175  },
176 };
177 
178 /* assign ISR vector names */
179 #define UART_0_ISR (isr_usart2)
180 #define UART_1_ISR (isr_usart1)
181 #define UART_2_ISR (isr_usart3)
182 
183 /* deduct number of defined UART interfaces */
184 #define UART_NUMOF ARRAY_SIZE(uart_config)
191 static const spi_conf_t spi_config[] = {
192  {
193  .dev = SPI1,
194  .mosi_pin = GPIO_PIN(PORT_A, 7),
195  .miso_pin = GPIO_PIN(PORT_A, 6),
196  .sclk_pin = GPIO_PIN(PORT_A, 5),
197  .cs_pin = GPIO_PIN(PORT_A, 4),
198  .mosi_af = GPIO_AF5,
199  .miso_af = GPIO_AF5,
200  .sclk_af = GPIO_AF5,
201  .cs_af = GPIO_AF5,
202  .rccmask = RCC_APB2ENR_SPI1EN,
203  .apbbus = APB2,
204 #ifdef MODULE_PERIPH_DMA
205  .tx_dma = 0,
206  .tx_dma_chan = 3,
207  .rx_dma = 1,
208  .rx_dma_chan = 3,
209 #endif
210  }
211 };
212 
213 #define SPI_NUMOF ARRAY_SIZE(spi_config)
220 static const i2c_conf_t i2c_config[] = {
221  {
222  .dev = I2C1,
223  .speed = I2C_SPEED_NORMAL,
224  .scl_pin = GPIO_PIN(PORT_B, 6),
225  .sda_pin = GPIO_PIN(PORT_B, 7),
226  .scl_af = GPIO_AF4,
227  .sda_af = GPIO_AF4,
228  .bus = APB1,
229  .rcc_mask = RCC_APB1ENR_I2C1EN,
230  .clk = CLOCK_APB1,
231  .irqn = I2C1_EV_IRQn
232  }
233 };
234 
235 #define I2C_0_ISR isr_i2c1_ev
236 
237 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
240 #ifdef __cplusplus
241 }
242 #endif
243 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:250
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:252
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF3
use alternate function 3
Definition: cpu_gpio.h:104
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:377
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218