periph_conf.h
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1 /*
2  * Copyright (C) 2014-2016 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
22 #include "periph_cpu.h"
23 #include "clk_conf.h"
24 #include "cfg_timer_tim5.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 static const dma_conf_t dma_config[] = {
35  { .stream = 1 }, /* DMA1 Channel 2 - SPI1_RX / USART3_TX */
36  { .stream = 2 }, /* DMA1 Channel 3 - SPI1_TX */
37  { .stream = 6 }, /* DMA1 Channel 7 - USART2_TX */
38  { .stream = 4 }, /* DMA1 Channel 4 - USART1_TX */
39 };
40 
41 #define DMA_0_ISR isr_dma1_channel2
42 #define DMA_1_ISR isr_dma1_channel3
43 #define DMA_2_ISR isr_dma1_channel7
44 #define DMA_3_ISR isr_dma1_channel4
45 
46 #define DMA_NUMOF ARRAY_SIZE(dma_config)
53 static const uart_conf_t uart_config[] = {
54  {
55  .dev = USART2,
56  .rcc_mask = RCC_APB1ENR_USART2EN,
57  .rx_pin = GPIO_PIN(PORT_A, 3),
58  .tx_pin = GPIO_PIN(PORT_A, 2),
59  .rx_af = GPIO_AF7,
60  .tx_af = GPIO_AF7,
61  .bus = APB1,
62  .irqn = USART2_IRQn,
63 #ifdef MODULE_PERIPH_DMA
64  .dma = 2,
65  .dma_chan = 2
66 #endif
67  },
68  {
69  .dev = USART1,
70  .rcc_mask = RCC_APB2ENR_USART1EN,
71  .rx_pin = GPIO_PIN(PORT_A, 10),
72  .tx_pin = GPIO_PIN(PORT_A, 9),
73  .rx_af = GPIO_AF7,
74  .tx_af = GPIO_AF7,
75  .bus = APB2,
76  .irqn = USART1_IRQn,
77 #ifdef MODULE_PERIPH_DMA
78  .dma = 3,
79  .dma_chan = 2
80 #endif
81  },
82  {
83  .dev = USART3,
84  .rcc_mask = RCC_APB1ENR_USART3EN,
85  .rx_pin = GPIO_PIN(PORT_C, 11),
86  .tx_pin = GPIO_PIN(PORT_C, 10),
87  .rx_af = GPIO_AF7,
88  .tx_af = GPIO_AF7,
89  .bus = APB1,
90  .irqn = USART3_IRQn,
91 #ifdef MODULE_PERIPH_DMA
92  .dma = 0,
93  .dma_chan = 2
94 #endif
95  },
96 };
97 
98 #define UART_0_ISR (isr_usart2)
99 #define UART_1_ISR (isr_usart1)
100 #define UART_2_ISR (isr_usart3)
101 
102 #define UART_NUMOF ARRAY_SIZE(uart_config)
109 static const pwm_conf_t pwm_config[] = {
110  {
111  .dev = TIM2,
112  .rcc_mask = RCC_APB1ENR_TIM2EN,
113  .chan = { { .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
114  { .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
115  { .pin = GPIO_UNDEF, .cc_chan = 0 },
116  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
117  .af = GPIO_AF1,
118  .bus = APB1
119  },
120  {
121  .dev = TIM3,
122  .rcc_mask = RCC_APB1ENR_TIM3EN,
123  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
124  { .pin = GPIO_PIN(PORT_C, 7) /* D9 */, .cc_chan = 1 },
125  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
126  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
127  .af = GPIO_AF2,
128  .bus = APB1
129  }
130 };
131 
132 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
139 static const spi_conf_t spi_config[] = {
140  {
141  .dev = SPI1,
142  .mosi_pin = GPIO_PIN(PORT_A, 7),
143  .miso_pin = GPIO_PIN(PORT_A, 6),
144  .sclk_pin = GPIO_PIN(PORT_A, 5),
145  .cs_pin = SPI_CS_UNDEF,
146  .mosi_af = GPIO_AF5,
147  .miso_af = GPIO_AF5,
148  .sclk_af = GPIO_AF5,
149  .cs_af = GPIO_AF5,
150  .rccmask = RCC_APB2ENR_SPI1EN,
151  .apbbus = APB2,
152 #ifdef MODULE_PERIPH_DMA
153  .tx_dma = 1,
154  .tx_dma_chan = 1,
155  .rx_dma = 0,
156  .rx_dma_chan = 1,
157 #endif
158  }
159 };
160 
161 #define SPI_NUMOF ARRAY_SIZE(spi_config)
168 static const i2c_conf_t i2c_config[] = {
169  {
170  .dev = I2C1,
171  .speed = I2C_SPEED_NORMAL,
172  .scl_pin = GPIO_PIN(PORT_B, 8),
173  .sda_pin = GPIO_PIN(PORT_B, 9),
174  .scl_af = GPIO_AF4,
175  .sda_af = GPIO_AF4,
176  .bus = APB1,
177  .rcc_mask = RCC_APB1ENR_I2C1EN,
178  .clk = CLOCK_APB1,
179  .irqn = I2C1_EV_IRQn
180  },
181  {
182  .dev = I2C2,
183  .speed = I2C_SPEED_NORMAL,
184  .scl_pin = GPIO_PIN(PORT_B, 10),
185  .sda_pin = GPIO_PIN(PORT_B, 11),
186  .scl_af = GPIO_AF4,
187  .sda_af = GPIO_AF4,
188  .bus = APB1,
189  .rcc_mask = RCC_APB1ENR_I2C2EN,
190  .clk = CLOCK_APB1,
191  .irqn = I2C2_EV_IRQn
192  }
193 };
194 
195 #define I2C_0_ISR isr_i2c1_ev
196 #define I2C_1_ISR isr_i2c2_ev
197 
198 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
205 static const adc_conf_t adc_config[] = {
206  { GPIO_PIN(PORT_A, 0), 0 },
207  { GPIO_PIN(PORT_A, 1), 1 },
208  { GPIO_PIN(PORT_A, 4), 4 },
209  { GPIO_PIN(PORT_B, 0), 8 },
210  { GPIO_PIN(PORT_C, 1), 11 },
211  { GPIO_PIN(PORT_C, 0), 10 },
212 };
213 
214 #define ADC_NUMOF ARRAY_SIZE(adc_config)
221 static const dac_conf_t dac_config[] = {
222  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
223  { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
224 };
225 
226 #define DAC_NUMOF ARRAY_SIZE(dac_config)
229 #ifdef __cplusplus
230 }
231 #endif
232 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:250
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:252
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:377
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218