periph_conf.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2018 OTA keys S.A.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* This board provides an LSE */
22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
24 #endif
25 
26 /* This board provides an HSE */
27 #ifndef CONFIG_BOARD_HAS_HSE
28 #define CONFIG_BOARD_HAS_HSE 1
29 #endif
30 
31 /* The HSE provides a 12MHz clock */
32 #ifndef CONFIG_CLOCK_HSE
33 #define CONFIG_CLOCK_HSE MHZ(12)
34 #endif
35 
36 #include "periph_cpu.h"
37 #include "clk_conf.h"
38 #include "cfg_timer_tim5.h"
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
48 static const dma_conf_t dma_config[] = {
49  { .stream = 9 }, /* DMA2 Stream 1 - SPI4_TX */
50  { .stream = 8 }, /* DMA2 Stream 0 - SPI4_RX */
51 };
52 
53 #define DMA_0_ISR isr_dma2_stream1
54 #define DMA_1_ISR isr_dma2_stream0
55 
56 #define DMA_NUMOF ARRAY_SIZE(dma_config)
63 static const uart_conf_t uart_config[] = {
64  {
65  .dev = USART1,
66  .rcc_mask = RCC_APB2ENR_USART1EN,
67  .rx_pin = GPIO_PIN(PORT_A, 10),
68  .tx_pin = GPIO_PIN(PORT_A, 9),
69  .rx_af = GPIO_AF7,
70  .tx_af = GPIO_AF7,
71  .bus = APB2,
72  .irqn = USART1_IRQn,
73 #ifdef MODULE_PERIPH_UART_HW_FC
74  .cts_pin = GPIO_UNDEF,
75  .rts_pin = GPIO_UNDEF,
76  .cts_af = GPIO_AF7,
77  .rts_af = GPIO_AF7,
78 #endif
79 #ifdef MODULE_PERIPH_DMA
80  .dma = DMA_STREAM_UNDEF,
81  .dma_chan = UINT8_MAX,
82 #endif
83  },
84  { /* Modem UART */
85  .dev = USART2,
86  .rcc_mask = RCC_APB1ENR_USART2EN,
87  .rx_pin = GPIO_PIN(PORT_D, 6),
88  .tx_pin = GPIO_PIN(PORT_D, 5),
89  .rx_af = GPIO_AF7,
90  .tx_af = GPIO_AF7,
91  .bus = APB1,
92  .irqn = USART2_IRQn,
93 #ifdef MODULE_PERIPH_UART_HW_FC
94  .cts_pin = GPIO_PIN(PORT_D, 3),
95  .rts_pin = GPIO_PIN(PORT_D, 4),
96  .cts_af = GPIO_AF7,
97  .rts_af = GPIO_AF7,
98 #endif
99 #ifdef MODULE_PERIPH_DMA
100  .dma = DMA_STREAM_UNDEF,
101  .dma_chan = UINT8_MAX,
102 #endif
103  },
104  { /* GPS UART */
105  .dev = USART6,
106  .rcc_mask = RCC_APB2ENR_USART6EN,
107  .rx_pin = GPIO_PIN(PORT_C, 7),
108  .tx_pin = GPIO_PIN(PORT_C, 6),
109  .rx_af = GPIO_AF8,
110  .tx_af = GPIO_AF8,
111  .bus = APB2,
112  .irqn = USART6_IRQn,
113 #ifdef MODULE_PERIPH_UART_HW_FC
114  .cts_pin = GPIO_UNDEF,
115  .rts_pin = GPIO_UNDEF,
116  .cts_af = GPIO_AF8,
117  .rts_af = GPIO_AF8,
118 #endif
119 #ifdef MODULE_PERIPH_DMA
120  .dma = DMA_STREAM_UNDEF,
121  .dma_chan = UINT8_MAX,
122 #endif
123  },
124  { /* Arduino Port UART */
125  .dev = USART3,
126  .rcc_mask = RCC_APB1ENR_USART3EN,
127  .rx_pin = GPIO_PIN(PORT_D, 9),
128  .tx_pin = GPIO_PIN(PORT_D, 8),
129  .rx_af = GPIO_AF7,
130  .tx_af = GPIO_AF7,
131  .bus = APB1,
132  .irqn = USART3_IRQn,
133 #ifdef MODULE_PERIPH_UART_HW_FC
134  .cts_pin = GPIO_UNDEF,
135  .rts_pin = GPIO_UNDEF,
136  .cts_af = GPIO_AF7,
137  .rts_af = GPIO_AF7,
138 #endif
139 #ifdef MODULE_PERIPH_DMA
140  .dma = DMA_STREAM_UNDEF,
141  .dma_chan = UINT8_MAX,
142 #endif
143  },
144 };
145 
146 #define UART_0_ISR (isr_usart1)
147 #define UART_1_ISR (isr_usart2)
148 #define UART_2_ISR (isr_usart6)
149 #define UART_3_ISR (isr_usart3)
150 
151 #define UART_NUMOF ARRAY_SIZE(uart_config)
158 static const spi_conf_t spi_config[] = {
159  {
160  .dev = SPI4,
161  .mosi_pin = GPIO_PIN(PORT_E, 6),
162  .miso_pin = GPIO_PIN(PORT_E, 5),
163  .sclk_pin = GPIO_PIN(PORT_E, 2),
164  .cs_pin = GPIO_PIN(PORT_E, 11),
165  .mosi_af = GPIO_AF5,
166  .miso_af = GPIO_AF5,
167  .sclk_af = GPIO_AF5,
168  .cs_af = GPIO_AF5,
169  .rccmask = RCC_APB2ENR_SPI4EN,
170  .apbbus = APB2,
171 #ifdef MODULE_PERIPH_DMA
172  .tx_dma = 0,
173  .tx_dma_chan = 4,
174  .rx_dma = 1,
175  .rx_dma_chan = 4,
176 #endif
177  },
178 };
179 
180 #define SPI_NUMOF ARRAY_SIZE(spi_config)
187 static const i2c_conf_t i2c_config[] = {
188  {
189  .dev = I2C1,
190  .speed = I2C_SPEED_NORMAL,
191  .scl_pin = GPIO_PIN(PORT_B, 6),
192  .sda_pin = GPIO_PIN(PORT_B, 7),
193  .scl_af = GPIO_AF4,
194  .sda_af = GPIO_AF4,
195  .bus = APB1,
196  .rcc_mask = RCC_APB1ENR_I2C1EN,
197  .clk = CLOCK_APB1,
198  .irqn = I2C1_EV_IRQn
199  },
200  {
201  .dev = I2C3,
202  .speed = I2C_SPEED_NORMAL,
203  .scl_pin = GPIO_PIN(PORT_A, 8),
204  .sda_pin = GPIO_PIN(PORT_C, 9),
205  .scl_af = GPIO_AF4,
206  .sda_af = GPIO_AF4,
207  .bus = APB1,
208  .rcc_mask = RCC_APB1ENR_I2C3EN,
209  .clk = CLOCK_APB1,
210  .irqn = I2C3_EV_IRQn
211  }
212 };
213 
214 #define I2C_0_ISR isr_i2c1_ev
215 #define I2C_1_ISR isr_i2c3_ev
216 
217 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
230 static const adc_conf_t adc_config[] = {
231  {GPIO_PIN(PORT_A, 3), 0, 3},
232  {GPIO_PIN(PORT_C, 0), 0, 10},
233  {GPIO_PIN(PORT_C, 3), 0, 4},
234  {GPIO_PIN(PORT_A, 4), 0, 14},
235  {GPIO_PIN(PORT_B, 7), 0, 7},
236  {GPIO_PIN(PORT_B, 6), 0, 6},
237  {GPIO_UNDEF, 0, 18}, /* VBAT */
238 };
239 
240 #define VBAT_ADC ADC_LINE(6)
241 #define ADC_NUMOF ARRAY_SIZE(adc_config)
244 #ifdef __cplusplus
245 }
246 #endif
247 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_E
port E
Definition: periph_cpu.h:50
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:250
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:377
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218