cfg_usb_otg_hs_phy_utmi.h
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1 /*
2  * Copyright (C) 2019 Koen Zandberg
3  * 2022 Gunar Schorcht
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
27 #include "periph_cpu.h"
28 #include "usbdev_synopsys_dwc2.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
37 #define DWC2_USB_OTG_HS_ENABLED
38 
39 #ifndef USBPHYC_TUNE_VALUE
53 #define USBPHYC_TUNE_VALUE 0x00000f13U
54 #endif
55 
60  {
61  .periph = USB_OTG_HS_PERIPH_BASE,
62  .type = DWC2_USB_OTG_HS,
63  .phy = DWC2_USB_OTG_PHY_UTMI,
64  .rcc_mask = RCC_AHB1ENR_OTGHSEN,
65  .irqn = OTG_HS_IRQn,
66  .ahb = AHB1,
67  .dm = GPIO_PIN(PORT_B, 14),
68  .dp = GPIO_PIN(PORT_B, 15),
69  .af = GPIO_AF10,
70  .phy_tune = USBPHYC_TUNE_VALUE,
71  }
72 };
73 
77 #define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
78 
79 #ifdef __cplusplus
80 }
81 #endif
82 
@ PORT_B
port B
Definition: periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define USBPHYC_TUNE_VALUE
Default value of USBPHYC tuning control register.
static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[]
Common USB OTG HS configuration.
@ GPIO_AF10
use alternate function 10
Definition: cpu_gpio.h:112
USB OTG configuration.
uintptr_t periph
USB peripheral base address.
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.
@ DWC2_USB_OTG_PHY_UTMI
UTMI for internal HS PHY.
@ DWC2_USB_OTG_HS
High speed peripheral.