cpu_eth.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2017 OTA keys S.A.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
23 #include <stdint.h>
24 
25 #include "periph/cpu_gpio.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
34 typedef enum {
35  MII = 18,
36  RMII = 9,
37  SMI = 2,
38 } eth_mode_t;
39 
43 typedef struct {
45  uint16_t speed;
46  uint8_t dma;
47  uint8_t dma_chan;
48  uint8_t phy_addr;
49  gpio_t pins[];
52 } eth_conf_t;
53 
61 typedef struct eth_dma_desc {
62  volatile uint32_t status;
63  volatile uint32_t control;
64  char * volatile buffer_addr;
65  struct eth_dma_desc * volatile desc_next;
66  volatile uint32_t reserved1_ext;
67  volatile uint32_t reserved2;
80  volatile uint32_t ts_low;
81  volatile uint32_t ts_high;
83 
88 #define RX_DESC_STAT_LS (BIT8)
89 #define RX_DESC_STAT_FS (BIT9)
96 #define RX_DESC_STAT_FL (0x3FFF0000) /* bits 16-29 */
97 #define RX_DESC_STAT_DE (BIT14)
98 #define RX_DESC_STAT_ES (BIT15)
99 #define RX_DESC_STAT_OWN (BIT31)
112 #define RX_DESC_CTRL_RCH (BIT14)
118 #define TX_DESC_STAT_UF (BIT1)
119 #define TX_DESC_STAT_EC (BIT8)
120 #define TX_DESC_STAT_NC (BIT10)
121 #define TX_DESC_STAT_ES (BIT15)
122 #define TX_DESC_STAT_TTSS (BIT17)
130 #define TX_DESC_STAT_TCH (BIT20)
131 #define TX_DESC_STAT_TER (BIT21)
142 #define TX_DESC_STAT_CIC (BIT22 | BIT23)
143 #define TX_DESC_STAT_CIC_NO_HW_CHECKSUM (0)
144 #define TX_DESC_STAT_CIC_HW_CHECKSUM_IPV4 (BIT22)
145 #define TX_DESC_STAT_CIC_HW_CHECKSUM_BOTH (BIT22 | BIT32)
147 #define TX_DESC_STAT_TTSE (BIT25)
148 #define TX_DESC_STAT_FS (BIT28)
149 #define TX_DESC_STAT_LS (BIT29)
150 #define TX_DESC_STAT_IC (BIT30)
151 #define TX_DESC_STAT_OWN (BIT31)
154 #ifdef MODULE_PERIPH_ETH_COMMON
159 void stm32_eth_common_init(void);
160 #endif /* MODULE_PERIPH_ETH_COMMON */
161 
162 #ifdef __cplusplus
163 }
164 #endif
165 
eth_mode_t
STM32 Ethernet configuration mode.
Definition: cpu_eth.h:34
@ SMI
Configuration for SMI.
Definition: cpu_eth.h:37
@ MII
Configuration for MII.
Definition: cpu_eth.h:35
@ RMII
Configuration for RMII.
Definition: cpu_eth.h:36
struct eth_dma_desc edma_desc_t
Layout of enhanced RX/TX DMA descriptor.
GPIO CPU definitions for the STM32 family.
Ethernet Peripheral configuration.
Definition: cpu_eth.h:43
uint8_t dma_chan
DMA channel used for TX.
Definition: cpu_eth.h:47
uint8_t dma
Locical CMA Descriptor used for TX.
Definition: cpu_eth.h:46
uint8_t phy_addr
PHY address.
Definition: cpu_eth.h:48
eth_mode_t mode
Select configuration mode.
Definition: cpu_eth.h:44
uint16_t speed
Speed selection.
Definition: cpu_eth.h:45
Layout of enhanced RX/TX DMA descriptor.
Definition: cpu_eth.h:61
volatile uint32_t reserved1_ext
RX: Extended status, TX: reserved.
Definition: cpu_eth.h:66
volatile uint32_t ts_low
Sub-second part of PTP timestamp of transmitted / sent frame.
Definition: cpu_eth.h:80
volatile uint32_t reserved2
Reserved for future use.
Definition: cpu_eth.h:67
char *volatile buffer_addr
RX/TX buffer.
Definition: cpu_eth.h:64
volatile uint32_t control
Control bits.
Definition: cpu_eth.h:63
volatile uint32_t status
Mostly status bits, some control bits.
Definition: cpu_eth.h:62
struct eth_dma_desc *volatile desc_next
Address of next DMA descriptor.
Definition: cpu_eth.h:65
volatile uint32_t ts_high
Second part of PTP timestamp.
Definition: cpu_eth.h:81