periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Rakendra Thapa <rakendrathapa@gmail.com>
3  * Copyright (C) 2017 Marc Poulhiès <dkm@kataplop.net>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
23 #include "cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 #define HAVE_GPIO_T
34 typedef uint32_t gpio_t;
35 #define GPIO_PIN(x, y) ((gpio_t)((x<<4) | y))
38 #ifndef DOXYGEN
43 #define HAVE_GPIO_MODE_T
44 typedef enum {
45  GPIO_IN = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD << 4)),
46  GPIO_IN_PD = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPD << 4)),
47  GPIO_IN_PU = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPU << 4)),
48  GPIO_OUT = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_STD << 4)),
49  GPIO_OD = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD << 4)),
50  GPIO_OD_PU = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD_WPU << 4)),
51 } gpio_mode_t;
53 #endif /* ndef DOXYGEN */
54 
59 #define HAVE_GPIO_DIR_T
60 typedef enum {
61  GPIO_DIR_IN = GPIO_DIR_MODE_IN,
62  GPIO_DIR_OUT = GPIO_DIR_MODE_OUT
66 #ifndef DOXYGEN
71 #define HAVE_GPIO_FLANK_T
72 typedef enum {
73  GPIO_FALLING = GPIO_FALLING_EDGE,
74  GPIO_RISING = GPIO_RISING_EDGE,
75  GPIO_BOTH = GPIO_BOTH_EDGES
76 } gpio_flank_t;
78 #endif /* ndef DOXYGEN */
79 
83 enum {
84  PORT_A = 0,
85  PORT_B = 1,
86  PORT_C = 2,
87  PORT_D = 3,
88  PORT_E = 4,
89  PORT_F = 5,
90 };
91 
95 #ifndef DOXYGEN
96 #define HAVE_ADC_RES_T
97 typedef enum {
98  ADC_RES_6BIT = 0xa00,
99  ADC_RES_8BIT = 0xb00,
100  ADC_RES_10BIT = ADC_RES_10BIT_S,
101  ADC_RES_12BIT = ADC_RES_12BIT_S,
102  ADC_RES_14BIT = 0xc00,
103  ADC_RES_16BIT = 0xd00,
104 } adc_res_t;
105 #endif /* ndef DOXYGEN */
106 
110 typedef struct {
111  uint32_t dev;
112  uint32_t max;
113  int irqn;
114  uint32_t sysctl;
115  uint32_t intbase;
116  int channels;
117 } timer_conf_t;
118 
124 #define SPI_HWCS(x) (UINT_MAX - 1)
125 
130 typedef struct {
131  unsigned long ssi_sysctl;
132  unsigned long ssi_base;
133  unsigned long gpio_sysctl;
134  unsigned long gpio_port;
135  struct {
136  unsigned long clk;
137  unsigned long fss;
138  unsigned long rx;
139  unsigned long tx;
140  unsigned long mask;
141  } pins;
142 } spi_conf_t;
149 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE 1
150 #define PERIPH_SPI_NEEDS_TRANSFER_REG 1
151 #define PERIPH_SPI_NEEDS_TRANSFER_REGS 1
152 #define PERIPH_SPI_NEEDS_INIT_CS 1
155 #ifndef DOXYGEN
160 #define HAVE_SPI_CLK_T 1
161 typedef enum {
162  SPI_CLK_100KHZ = 100000,
163  SPI_CLK_400KHZ = 400000,
164  SPI_CLK_1MHZ = 1000000,
165  SPI_CLK_4MHZ = 4000000,
166  SPI_CLK_5MHZ = 5000000,
167  SPI_CLK_10MHZ = 10000000,
168 } spi_clk_t;
175 #define HAVE_SPI_MODE_T 1
176 typedef enum {
177  SPI_MODE_0 = SSI_FRF_MOTO_MODE_0,
178  SPI_MODE_1 = SSI_FRF_MOTO_MODE_1,
179  SPI_MODE_2 = SSI_FRF_MOTO_MODE_2,
180  SPI_MODE_3 = SSI_FRF_MOTO_MODE_0,
181 } spi_mode_t;
183 #endif /* ndef DOXYGEN */
184 
185 #ifdef __cplusplus
186 }
187 #endif
188 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_F
port F
Definition: periph_cpu.h:51
@ PORT_E
port E
Definition: periph_cpu.h:50
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
gpio_flank_t
Definition: periph_cpu.h:179
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:164
@ GPIO_IN
select GPIO MASK as input
Definition: periph_cpu.h:163
spi_clk_t
Definition: periph_cpu.h:351
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:91
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:92
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition: adc.h:98
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition: adc.h:94
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition: adc.h:97
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition: adc.h:93
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition: adc.h:95
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition: adc.h:96
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:91
@ GPIO_FALLING
emit interrupt on falling flank
Definition: periph_cpu.h:109
@ GPIO_RISING
emit interrupt on rising flank
Definition: periph_cpu.h:110
@ GPIO_BOTH
emit interrupt on both flanks
Definition: periph_cpu.h:111
@ GPIO_OD
configure as output in open-drain mode without pull resistor
Definition: gpio.h:123
@ GPIO_IN_PU
configure as input with pull-up resistor
Definition: gpio.h:121
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:125
@ GPIO_IN_PD
configure as input with pull-down resistor
Definition: gpio.h:120
@ SPI_MODE_0
CPOL=0, CPHA=0.
Definition: periph_cpu.h:43
@ SPI_MODE_2
CPOL=1, CPHA=0.
Definition: periph_cpu.h:45
@ SPI_MODE_1
CPOL=0, CPHA=1.
Definition: periph_cpu.h:44
@ SPI_MODE_3
CPOL=1, CPHA=1.
Definition: periph_cpu.h:46
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:356
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:355
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:353
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:354
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:352
gpio_dir_t
Definition: periph_cpu.h:60
@ GPIO_DIR_IN
configure pin as input
Definition: periph_cpu.h:61
@ GPIO_DIR_OUT
configure pin as output
Definition: periph_cpu.h:62
spi_mode_t
Support SPI modes.
Definition: periph_cpu.h:42
SPI device configuration.
Definition: periph_cpu.h:336
unsigned long fss
pin used for FSS
Definition: periph_cpu.h:137
unsigned long tx
pin used for MOSI
Definition: periph_cpu.h:139
unsigned long clk
pin used for SCK
Definition: periph_cpu.h:136
unsigned long mask
Pin mask.
Definition: periph_cpu.h:140
unsigned long gpio_sysctl
GPIO device in sysctl.
Definition: periph_cpu.h:133
unsigned long rx
pin used for MISO
Definition: periph_cpu.h:138
unsigned long ssi_base
SSI base address.
Definition: periph_cpu.h:132
unsigned long gpio_port
GPIO port.
Definition: periph_cpu.h:134
unsigned long ssi_sysctl
SSI device in sysctl.
Definition: periph_cpu.h:131
Timer device configuration.
Definition: periph_cpu.h:263
uint32_t sysctl
Address of timer system control.
Definition: periph_cpu.h:114
int irqn
Number of the higher timer IRQ channel.
Definition: periph_cpu.h:113
int channels
Number of channels for the timer.
Definition: periph_cpu.h:116
uint32_t intbase
Interrupt base of timer.
Definition: periph_cpu.h:115
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:111