periph_cpu_common.h
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1 /*
2  * Copyright (C) 2015 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 #include <stdbool.h>
22 
23 #include "bitarithm.h"
24 #include "compiler_hints.h"
25 #include "cpu.h"
26 #include "msp430_regs.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
36 #define HAVE_GPIO_T
37 typedef uint16_t gpio_t;
43 #define GPIO_UNDEF (0xffff)
44 
48 #define GPIO_PIN(x, y) ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0x07))))
49 
53 #define SPI_HWCS(x) (SPI_CS_UNDEF)
54 
64 #define TIMER_CHANNEL_NUMOF 7
65 
69 #define RAMSTART 0x200
70 
75 #define HAVE_GPIO_FLANK_T
79 typedef enum {
80  GPIO_FALLING = 0xff,
81  GPIO_RISING = 0x00,
82  GPIO_BOTH = 0xab
89 enum {
90  P1 = 1,
91  P2 = 2,
92  P3 = 3,
93  P4 = 4,
94  P5 = 5,
95  P6 = 6,
96 };
97 
98 #ifndef DOXYGEN
99 #define HAVE_GPIO_STATE_T
100 typedef enum {
101  GPIO_INPUT,
107 } gpio_state_t;
108 
109 #define HAVE_GPIO_SLEW_T
110 typedef enum {
111  GPIO_SLEW_SLOWEST = 0,
112  GPIO_SLEW_SLOW = 0,
113  GPIO_SLEW_FAST = 0,
114  GPIO_SLEW_FASTEST = 0,
115 } gpio_slew_t;
116 
117 #define HAVE_GPIO_PULL_STRENGTH_T
118 typedef enum {
119  GPIO_PULL_WEAKEST = 0,
120  GPIO_PULL_WEAK = 0,
121  GPIO_PULL_STRONG = 0,
124 
125 #define HAVE_GPIO_DRIVE_STRENGTH_T
126 typedef enum {
127  GPIO_DRIVE_WEAKEST = 0,
128  GPIO_DRIVE_WEAK = 0,
129  GPIO_DRIVE_STRONG = 0,
132 #endif /* !DOXYGEN */
133 
140 void gpio_periph_mode(gpio_t pin, bool enable);
141 
148 extern uint32_t msp430_dco_freq;
149 
153 typedef enum {
172 
176 typedef enum {
201 
205 typedef enum {
223 
227 typedef enum {
245 
249 typedef enum {
267 
280 typedef struct {
296  uint32_t lfxt1_frequency;
303  uint32_t xt2_frequency;
336  bool has_r_osc;
341  bool has_xt2;
343 
347 typedef enum {
353 
359 typedef enum {
364 
368 typedef struct {
378 } timer_conf_t;
379 
411 
415 extern msp430_timer_t TIMER_A;
416 
424 extern REG16 TIMER_A_IRQFLAGS;
425 
433 extern REG16 TIMER_B_IRQFLAGS;
434 
438 extern msp430_timer_t TIMER_B;
456 
466 void clock_init(void);
467 
474 
481 
492 
503 
504 #ifdef __cplusplus
505 }
506 #endif
507 
Helper functions for bit arithmetic.
Common macros and compiler attributes/pragmas configuration.
#define PURE
The function has no effects except the return value and its return value depends only on the paramete...
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition: gpio_ll.h:275
gpio_state_t
Enumeration of GPIO states (direction)
Definition: gpio_ll.h:165
gpio_slew_t
Enumeration of slew rate settings.
Definition: gpio_ll.h:339
gpio_drive_strength_t
Enumeration of drive strength options.
Definition: gpio_ll.h:306
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition: gpio_ll.h:276
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition: gpio_ll.h:277
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition: gpio_ll.h:278
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition: gpio_ll.h:279
@ GPIO_OUTPUT_OPEN_SOURCE
Use pin as output in open emitter configuration.
Definition: gpio_ll.h:202
@ GPIO_USED_BY_PERIPHERAL
The GPIO pin is used by a peripheral.
Definition: gpio_ll.h:221
@ GPIO_OUTPUT_OPEN_DRAIN
Use pin as output in open collector configuration.
Definition: gpio_ll.h:189
@ GPIO_OUTPUT_PUSH_PULL
Use pin as output in push-pull configuration.
Definition: gpio_ll.h:176
@ GPIO_DISCONNECT
Disconnect pin from all peripherals.
Definition: gpio_ll.h:249
@ GPIO_INPUT
Use pin as input.
Definition: gpio_ll.h:208
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition: gpio_ll.h:340
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition: gpio_ll.h:343
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition: gpio_ll.h:342
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition: gpio_ll.h:344
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition: gpio_ll.h:309
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition: gpio_ll.h:308
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition: gpio_ll.h:310
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition: gpio_ll.h:307
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:91
@ GPIO_FALLING
emit interrupt on falling flank
@ GPIO_RISING
emit interrupt on rising flank
@ GPIO_BOTH
not supported -> random value
msp430_port_p3_p6_t PORT_5
Register map of GPIO PORT 5.
gpio_flank_t
Enumeration of supported GPIO flanks.
msp430_timer_t TIMER_A
Register map of the timer A control registers.
msp430_clock_t
IDs of the different clock domains on the MSP430.
@ MSP430_CLOCK_AUXILIARY
Auxiliary clock.
@ MSP430_CLOCK_NUMOF
Number of clock domains.
@ MSP430_CLOCK_SUBMAIN
Subsystem main clock.
msp430_main_clock_source_t
Possible clock sources to generate the main clock from.
@ MAIN_CLOCK_SOURCE_XT2CLK
High frequency crystal between 450 kHz and 8 MHz.
@ MAIN_CLOCK_SOURCE_DCOCLK
Internal digitally controlled oscillator (DCO) with RC-type characteristics.
@ MAIN_CLOCK_SOURCE_LFXT1CLK
Low frequency 32.768 kHz or high frequency crystal between 450 kHz and 8 MHz.
uint32_t PURE msp430_submain_clock_freq(void)
Get the configured submain clock frequency.
msp430_timer_t TIMER_B
Register map of the timer B control registers.
msp430_port_p1_p2_t PORT_2
Register map of GPIO PORT 2.
void clock_init(void)
Call during boot up process to initialize the clock.
msp430_port_p1_p2_t PORT_1
Register map of GPIO PORT 1.
msp430_submain_clock_source_t
Possible clock sources to generate the submain clock from.
@ SUBMAIN_CLOCK_SOURCE_LFXT1CLK
Low frequency 32.768 kHz or high frequency crystal between 450 kHz and 8 MHz.
@ SUBMAIN_CLOCK_SOURCE_DCOCLK
Internal digitally controlled oscillator (DCO) with RC-type characteristics.
@ SUBMAIN_CLOCK_SOURCE_XT2CLK
High frequency crystal between 450 kHz and 8 MHz.
msp430_port_p3_p6_t PORT_6
Register map of GPIO PORT 6.
REG16 TIMER_B_IRQFLAGS
IRQ flags for TIMER_B.
void msp430_clock_release(msp430_clock_t clock)
Decrease the refcount of the subsystem main clock.
REG16 TIMER_A_IRQFLAGS
IRQ flags for TIMER_A.
msp430_submain_clock_divider_t
Clock dividers for the submain clock.
@ SUBMAIN_CLOCK_DIVIDE_BY_2
Divide the main clock by 2.
@ SUBMAIN_CLOCK_DIVIDE_BY_8
Divide the main clock by 8.
@ SUBMAIN_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ SUBMAIN_CLOCK_DIVIDE_BY_4
Divide the main clock by 4.
msp430_auxiliary_clock_divider_t
Clock dividers for the auxiliary clock.
@ AUXILIARY_CLOCK_DIVIDE_BY_4
Divide the main clock by 4.
@ AUXILIARY_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ AUXILIARY_CLOCK_DIVIDE_BY_2
Divide the main clock by 2.
@ AUXILIARY_CLOCK_DIVIDE_BY_8
Divide the main clock by 8.
uint32_t PURE msp430_auxiliary_clock_freq(void)
Get the configured auxiliary clock frequency.
msp430_port_p3_p6_t PORT_4
Register map of GPIO PORT 4.
msp430_timer_clock_source_t
Enumeration of possible clock sources for a timer.
@ TIMER_CLOCK_SOURCE_AUXILIARY_CLOCK
Auxiliary clock as clock source.
@ TIMER_CLOCK_SOURCE_TXCLK
External TxCLK as clock source.
@ TIMER_CLOCK_SOURCE_SUBMAIN_CLOCK
Sub-system master clock as clock source.
@ TIMER_CLOCK_SOURCE_INCLK
External INCLK as clock source.
void msp430_clock_acquire(msp430_clock_t clock)
Increase the refcount of the given clock.
msp430_main_clock_divider_t
Clock dividers for the main clock.
@ MAIN_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ MAIN_CLOCK_DIVIDE_BY_8
Divide the main clock by 8.
@ MAIN_CLOCK_DIVIDE_BY_2
Divide the main clock by 2.
@ MAIN_CLOCK_DIVIDE_BY_4
Divide the main clock by 4.
uint32_t msp430_dco_freq
The measured DCO frequency.
void default_clock_init(void)
Initialize the basic clock system to provide the main clock, the subsystem clock, and the auxiliary c...
@ P6
PORT 6.
@ P1
PORT 1.
@ P4
PORT 4.
@ P3
PORT 3.
@ P2
PORT 2.
@ P5
PORT 5.
msp430_port_p3_p6_t PORT_3
Register map of GPIO PORT 3.
void gpio_periph_mode(gpio_t pin, bool enable)
Enable or disable a pin to be used by peripheral modules.
#define TXSSEL_SMCLK
Sub-system master clock as clock source.
#define TXSSEL_TXCLK
External TxCLK as clock source.
#define TXSSEL_ACLK
Auxiliary clock as clock source.
#define TXSSEL_INCLK
External INCLK as clock source.
Native CPU header.
#define REG16(ADDR)
Type for 16-bit registers.
Definition: periph_gba.h:36
MSP430Fxzy Basic Clock System Parameters.
msp430_main_clock_source_t main_clock_source
The clock source to select for the main clock.
uint32_t lfxt1_frequency
The frequency of the LFXT1 crystal in Hz.
msp430_auxiliary_clock_divider_t auxiliary_clock_divier
Divider of the auxiliary clock.
uint32_t xt2_frequency
The frequency of the XT2 crystal in Hz.
msp430_submain_clock_source_t submain_clock_source
The clock source to select for the submain CPU clock.
uint32_t target_dco_frequency
The target frequency to run the DCO at in Hz.
msp430_submain_clock_divider_t submain_clock_divier
Divider of the submain clock.
bool has_xt2
A high frequency crystal (e.g.
msp430_main_clock_divider_t main_clock_divier
Divider of the main clock.
bool has_r_osc
An external resistor connected to source the current for the DCO.
GPIO Port 1/2 (with interrupt functionality)
Definition: msp430_regs.h:62
GPIO Port 3..6 (without interrupt functionality)
Timer peripheral registers.
Timer device configuration.
Definition: periph_cpu.h:263
msp430_timer_t * timer
Hardware timer to use.
REG16 * irq_flags
"Timer interrupt vector" register
msp430_timer_clock_source_t clock_source
Clock source to use.