CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author: Koen Zandberg koen@.nosp@m.berg.nosp@m.zand..nosp@m.net; Gunar Schorcht gunar.nosp@m.@sch.nosp@m.orcht.nosp@m..net

Definition in file periph_cpu.h.

#include <inttypes.h>
#include "cpu.h"
#include "clic.h"
#include "kernel_defines.h"
#include "macros/units.h"

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Go to the source code of this file.

Data Structures
union	gpio_conf_gd32v
	GPIO pin configuration for GD32V MCUs. More...

struct	adc_conf_t
	ADC device configuration. More...

struct	dac_conf_t
	DAC line configuration data. More...

struct	timer_conf_t
	Timer device configuration. More...

struct	uart_conf_t
	UART device configuration. More...

struct	spi_conf_t
	SPI device configuration. More...

struct	i2c_conf_t
	I2C configuration structure. More...

struct	pwm_chan_t
	PWM channel. More...

struct	pwm_conf_t
	PWM device configuration. More...

Macros
#define	ADC_DEVS (2U)
	Available number of ADC devices.

#define	DAC_CHANNEL_NUMOF (2)
	GD32V DAC has 2 channels.

#define	TIMER_CHANNEL_NUMOF (4U)
	GD32V timers have 4 capture-compare channels.

#define	TIMER_CHANNEL(tim, chan) (&dev(tim)->CH0CV + (chan 2))
	Macro for accessing the capture/compare register of a timer channel.

#define	UART_ISR_PRIO (2)
	UART interrupt priority.

#define	SPI_HWCS_MASK (0xffffff00)
	Define a magic number that tells us to use hardware chip select. More...

#define	SPI_HWCS(x) (SPI_HWCS_MASK \| x)
	Override the default SPI hardware chip select access macro. More...

#define	SPI_CS_UNDEF (GPIO_UNDEF)
	Define value for unused CS line.

#define	WDT_INTR_PRIORITY (PLIC_NUM_PRIORITIES)
	WDT interrupt priority: use highest priority.

#define	WDT_HAS_STOP (0)
	No brakes on the WDT train.

Enumerations
enum	bus_t { AHB , APB1 , APB2 , BUS_NUMOF }
	On-Chip buses. More...

enum
	Available GPIO ports.

enum	gpio_af_t { GPIO_AF_OUT_PP = 0xb , GPIO_AF_OUT_OD = 0xf , GPIO_AF0 = 0 , GPIO_AF1 , GPIO_AF2 , GPIO_AF3 , GPIO_AF4 , GPIO_AF5 , GPIO_AF6 , GPIO_AF7 , GPIO_AF8 , GPIO_AF9 , GPIO_AF10 , GPIO_AF11 , GPIO_AF12 , GPIO_AF13 , GPIO_AF14 , GPIO_AF15 , GPIO_AF_UNDEF }
	Override alternative GPIO mode options. More...

Functions
void	gpio_init_af (gpio_t pin, gpio_af_t af)
	Configure the alternate function for the given pin. More...

void	gpio_init_analog (gpio_t pin)
	Configure the given pin to be used as ADC input. More...

void	periph_clk_en (bus_t bus, uint32_t mask)
	Enable the given peripheral clock. More...

void	periph_clk_dis (bus_t bus, uint32_t mask)
	Disable the given peripheral clock. More...

uint32_t	periph_apb_clk (bus_t bus)
	Get the actual bus clock frequency for the APB buses. More...

void	gd32vf103_clock_init (void)

void	gd32v_enable_irc8 (void)

void	gd32v_disable_irc8 (void)

Power management configuration
#define	PM_NUM_MODES (3U)
	Number of usable low power modes. More...

#define	CONFIG_PM_EWUP_USED (0U)
	Wake-up pin used.

enum	{ GD32V_PM_STANDBY = 0 , GD32V_PM_DEEPSLEEP = 1 , GD32V_PM_IDLE = 2 }
	Power modes. More...

#define	PERIPH_SPI_NEEDS_TRANSFER_BYTE
	Use the shared SPI functions. More...

#define	PERIPH_SPI_NEEDS_TRANSFER_REG
	Use transfer reg function from periph common.

#define	PERIPH_SPI_NEEDS_TRANSFER_REGS
	Use transfer regs function from periph common.

#define	HAVE_SPI_CLK_T
	Override SPI clock speed values.

enum	{ SPI_CLK_100KHZ = KHZ(100) , SPI_CLK_400KHZ = KHZ(400) , SPI_CLK_1MHZ = MHZ(1) , SPI_CLK_5MHZ = MHZ(5) , SPI_CLK_10MHZ = MHZ(10) }

typedef uint32_t	spi_clk_t
	SPI clock type.

Use the shared I2C functions
#define	PERIPH_I2C_NEED_READ_REG
	Use read reg function from periph common.

#define	PERIPH_I2C_NEED_WRITE_REG
	Use write reg function from periph common.

#define	PERIPH_I2C_NEED_READ_REGS
	Use read regs function from periph common.

#define	PERIPH_I2C_NEED_WRITE_REGS
	Use write regs function from periph common.

WDT upper and lower bound times in ms
#define	NWDT_TIME_LOWER_LIMIT (1)

#define	NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * MS_PER_SEC + 1)

RTT/RTC configuration
#define	RTT_DEV RTC
	RTC is used as RTT device.

#define	RTT_IRQ RTC_ALARM_IRQn
	RTC_ALARM_IRQn is used as IRQ number.

#define	RTT_IRQ_PRIORITY (2)
	RTT interrupt priority.

#define	RTT_MAX_VALUE (0xffffffff)
	maximum RTT value

#define	RTT_MIN_FREQUENCY (1U)
	minimum RTT frequency in Hz

USB device definitions
#define	USBDEV_SET_ADDR_AFTER_STATUS 0
	Set device address after SETUP stage.

#define	USBDEV_NUM_ENDPOINTS 4
	Number of USB OTG FS endpoints including EP0.

Macro Definition Documentation

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE

Use the shared SPI functions.

Use transfer byte function from periph common

Definition at line 376 of file periph_cpu.h.

◆ PM_NUM_MODES

#define PM_NUM_MODES (3U)

Number of usable low power modes.

Number of usable low power modes

Definition at line 38 of file periph_cpu.h.

◆ SPI_HWCS

#define SPI_HWCS ( x ) (SPI_HWCS_MASK | x)

Override the default SPI hardware chip select access macro.

Since the CPU does only support one single hardware chip select line, we can detect the usage of non-valid lines by comparing to SPI_HWCS_VALID.

Definition at line 354 of file periph_cpu.h.

◆ SPI_HWCS_MASK

#define SPI_HWCS_MASK (0xffffff00)

Define a magic number that tells us to use hardware chip select.

We use a random value here, that does clearly differentiate from any possible GPIO_PIN(x) value.

Definition at line 346 of file periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Power modes.

The GD32V has three power modes (terminology as defined by GigaDevice).

Sleep: Only the clock of the RISC-V core is switched off.
Deep sleep: The RISC-V core including all AHB and APB peripheralsa and all high speed clocks are off. The LDO is in operation and the SRAM is retained. The MCU can be woken up by external interrupts or events without restart.
Standby: The RISC-V core including all AHB and APB peripherals, all high-speed clocks, and the LDO are off. The SRAM is not retained. The MCU can be woken up by WKUP or the NRST pin, watchdog reset and RTC alarms with restart.

Enumerator
GD32V_PM_STANDBY	STANDBY mode,
GD32V_PM_DEEPSLEEP	DEEPSLEEP mode, corresponds to STOP mode of STM32.
GD32V_PM_IDLE	IDLE mode.

Definition at line 56 of file periph_cpu.h.

◆ anonymous enum

anonymous enum

Enumerator
SPI_CLK_100KHZ	drive the SPI bus with 100KHz
SPI_CLK_400KHZ	drive the SPI bus with 400KHz
SPI_CLK_1MHZ	drive the SPI bus with 1MHz
SPI_CLK_5MHZ	drive the SPI bus with 5MHz
SPI_CLK_10MHZ	drive the SPI bus with 10MHz

Definition at line 388 of file periph_cpu.h.

◆ bus_t

enum bus_t

On-Chip buses.

Enumerator
AHB	Advanced High-performance Bus.
APB1	Advanced Peripheral Bus 1
APB2	Advanced Peripheral Bus 2
BUS_NUMOF	number of buses

Definition at line 73 of file periph_cpu.h.

◆ gpio_af_t

enum gpio_af_t

Override alternative GPIO mode options.

Enumerator
GPIO_AF_OUT_PP	alternate function output - push-pull
GPIO_AF_OUT_OD	alternate function output - open-drain
GPIO_AF0	use alternate function 0
GPIO_AF1	use alternate function 1
GPIO_AF2	use alternate function 2
GPIO_AF3	use alternate function 3
GPIO_AF4	use alternate function 4
GPIO_AF5	use alternate function 5
GPIO_AF6	use alternate function 6
GPIO_AF7	use alternate function 7
GPIO_AF8	use alternate function 8
GPIO_AF9	use alternate function 9
GPIO_AF10	use alternate function 10
GPIO_AF11	use alternate function 11
GPIO_AF12	use alternate function 12
GPIO_AF13	use alternate function 13
GPIO_AF14	use alternate function 14
GPIO_AF15	use alternate function 15
GPIO_AF_UNDEF	an UNDEF value definition, e.g. for register based spi

Definition at line 162 of file periph_cpu.h.

Function Documentation

◆ gpio_init_af()

void gpio_init_af	(	gpio_t	pin,
		gpio_af_t	af
	)

Configure the alternate function for the given pin.

Parameters

[in]	pin	pin to configure
[in]	af	alternate function to use

◆ gpio_init_analog()

void gpio_init_analog ( gpio_t pin )

Configure the given pin to be used as ADC input.

Parameters

[in] pin pin to configure

◆ periph_apb_clk()

uint32_t periph_apb_clk ( bus_t bus )

Get the actual bus clock frequency for the APB buses.

Parameters

[in] bus target APBx bus

Returns: bus clock frequency in Hz

◆ periph_clk_dis()

void periph_clk_dis	(	bus_t	bus,
		uint32_t	mask
	)

Disable the given peripheral clock.

Parameters

[in]	bus	bus the peripheral is connected to
[in]	mask	bit in the RCU enable register

◆ periph_clk_en()

void periph_clk_en	(	bus_t	bus,
		uint32_t	mask
	)

Enable the given peripheral clock.

Parameters

[in]	bus	bus the peripheral is connected to
[in]	mask	bit in the RCU enable register

Detailed Description

Data Structures

Macros

Enumerations

Functions

Power management configuration

Use the shared I2C functions

WDT upper and lower bound times in ms

RTT/RTC configuration

USB device definitions

Macro Definition Documentation

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

◆ PM_NUM_MODES

◆ SPI_HWCS

◆ SPI_HWCS_MASK

Enumeration Type Documentation

◆ anonymous enum

◆ anonymous enum

◆ bus_t

◆ gpio_af_t

Function Documentation

◆ gpio_init_af()

◆ gpio_init_analog()

◆ periph_apb_clk()

◆ periph_clk_dis()

◆ periph_clk_en()