SiFive fe310

SiFive fe310 RISC-V MCU specific implementation. More...

Detailed Description

SiFive fe310 RISC-V MCU specific implementation.

This module contains SiFive fe310 specific code and definition.

See also

RISC-V common

Files
file	clk_conf.h
	Clock configuration for the FE310 cpu.
file	cpu.h
	CPU specific definitions.
file	cpu_conf.h
	CPU specific configuration options.
file	periph_cpu.h
	CPU specific definitions for internal peripheral handling.
file	architecture_arch.h
	Architecture details.
file	atomic_utils_arch.h
	Implementation of fast atomic utility functions.
file	thread_arch.h
	Implementation of the kernels thread interface.