Common implementations and headers for the RISC-V CPU.
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Common implementations and headers for the RISC-V CPU.
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| file | clic.h |
| | RISCV CLIC interrupt controller definitions.
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| file | context_frame.h |
| | Thread context frame stored on stack.
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| file | cpu_common.h |
| | Basic definitions for the RISC-V CPU module.
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| |
| file | cpu_conf_common.h |
| | RISC-V CPU configuration options.
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| file | cpucycle.h |
| | Functions to read CPU cycle counter.
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| file | irq_arch.h |
| | Implementation of the kernels irq interface.
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| |
| file | periph_cpu_common.h |
| | CPU specific definitions for internal peripheral handling.
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| file | plic.h |
| | Platform-Level interrupt controller driver.
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| file | pmp.h |
| | RISC-V PMP configuration options.
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| |
◆ cpu_get_caller_pc()
| static uintptr_t cpu_get_caller_pc |
( |
void |
| ) |
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inlinestatic |
Gets the last instruction's address.
- Todo:
- : Not supported
Definition at line 50 of file cpu_common.h.
◆ cpu_reg_disable_bits()
| static void cpu_reg_disable_bits |
( |
volatile uint32_t * |
reg, |
|
|
uint32_t |
mask |
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) |
| |
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inlinestatic |
Convenience function to clear bit flags in a register.
- Parameters
-
| reg | register to clear bits in |
| mask | bits to clear in the register |
Definition at line 75 of file cpu_common.h.
◆ cpu_reg_enable_bits()
| static void cpu_reg_enable_bits |
( |
volatile uint32_t * |
reg, |
|
|
uint32_t |
mask |
|
) |
| |
|
inlinestatic |
Convenience function to set bit flags in a register.
- Parameters
-
| reg | register to set bits in |
| mask | bits to set in the register |
Definition at line 63 of file cpu_common.h.
◆ riscv_init()
Initialize rv32i specific core parts of the CPU.
Initialized the interrupt controller and the enables the FPU if present