periph_conf.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2016-2017 Inria
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
26 #include "periph_cpu.h"
27 #include "periph_conf_common.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
37 static const uart_conf_t uart_config[] = {
38  {
39  .dev = &SERCOM5->USART,
40  .rx_pin = GPIO_PIN(PB,23), /* ARDUINO_PIN_13, RX Pin */
41  .tx_pin = GPIO_PIN(PB,22), /* ARDUINO_PIN_14, TX Pin */
42 #ifdef MODULE_PERIPH_UART_HW_FC
43  .rts_pin = GPIO_UNDEF,
44  .cts_pin = GPIO_UNDEF,
45 #endif
46  .mux = GPIO_MUX_D,
47  .rx_pad = UART_PAD_RX_3,
48  .tx_pad = UART_PAD_TX_2,
49  .flags = UART_FLAG_NONE,
50  .gclk_src = SAM0_GCLK_MAIN,
51  }
52 };
53 
54 /* interrupt function name mapping */
55 #define UART_0_ISR isr_sercom5
56 
57 #define UART_NUMOF ARRAY_SIZE(uart_config)
64 static const spi_conf_t spi_config[] = {
65  {
66  .dev = &SERCOM1->SPI,
67  .miso_pin = GPIO_PIN(PA, 19), /* ARDUINO_PIN_8, SERCOM1-MISO */
68  .mosi_pin = GPIO_PIN(PA, 16), /* ARDUINO_PIN_10, SERCOM1-MOSI */
69  .clk_pin = GPIO_PIN(PA, 17), /* ARDUINO_PIN_9, SERCOM1-SCK */
70  .miso_mux = GPIO_MUX_C,
71  .mosi_mux = GPIO_MUX_C,
72  .clk_mux = GPIO_MUX_C,
73  .miso_pad = SPI_PAD_MISO_3,
74  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
75  .gclk_src = SAM0_GCLK_MAIN,
76 #ifdef MODULE_PERIPH_DMA
77  .tx_trigger = SERCOM1_DMAC_ID_TX,
78  .rx_trigger = SERCOM1_DMAC_ID_RX,
79 #endif
80  },
81  {
82  .dev = &SERCOM2->SPI,
83  .miso_pin = GPIO_PIN(PA, 15),
84  .mosi_pin = GPIO_PIN(PA, 12),
85  .clk_pin = GPIO_PIN(PA, 13),
86  .miso_mux = GPIO_MUX_C,
87  .mosi_mux = GPIO_MUX_C,
88  .clk_mux = GPIO_MUX_C,
89  .miso_pad = SPI_PAD_MISO_3,
90  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
91  .gclk_src = SAM0_GCLK_MAIN,
92 #ifdef MODULE_PERIPH_DMA
93  .tx_trigger = SERCOM2_DMAC_ID_TX,
94  .rx_trigger = SERCOM2_DMAC_ID_RX,
95 #endif
96  }
97 };
98 
99 #define SPI_NUMOF ARRAY_SIZE(spi_config)
102 #ifdef __cplusplus
103 }
104 #endif
105 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
Common peripheral configuration for the Particle Mesh.
@ UART_PAD_RX_3
select pad 3
@ PB
port B
@ PA
port A
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218