periph_conf.h
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1 /*
2  * Copyright (C) 2020 Scallog
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* This board provides an LSE */
22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
24 #endif
25 
26 /* This board provides an HSE */
27 #ifndef CONFIG_BOARD_HAS_HSE
28 #define CONFIG_BOARD_HAS_HSE 1
29 #endif
30 
31 #include "periph_cpu.h"
32 #include "clk_conf.h"
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
42 static const adc_conf_t adc_config[] = {
43  { GPIO_PIN(PORT_C, 0), 0, 10 },
44  { GPIO_PIN(PORT_C, 1), 0, 11 },
45  { GPIO_PIN(PORT_C, 2), 0, 12 },
46  { GPIO_PIN(PORT_C, 3), 0, 13 },
47  { GPIO_PIN(PORT_C, 4), 0, 14 },
48  { GPIO_PIN(PORT_C, 5), 0, 15 }
49 };
50 
51 #define ADC_NUMOF ARRAY_SIZE(adc_config)
58 static const pwm_conf_t pwm_config[] = {
59  {
60  .dev = TIM1,
61  .rcc_mask = RCC_APB2ENR_TIM1EN,
62  .chan = { { .pin = GPIO_PIN(PORT_A, 8), .cc_chan = 0 },
63  { .pin = GPIO_PIN(PORT_A, 9), .cc_chan = 1 },
64  { .pin = GPIO_PIN(PORT_A, 10), .cc_chan = 2 },
65  { .pin = GPIO_PIN(PORT_A, 11), .cc_chan = 3 } },
66  .af = GPIO_AF_OUT_PP,
67  .bus = APB2
68  },
69  {
70  .dev = TIM2,
71  .rcc_mask = RCC_APB1ENR_TIM2EN,
72  .chan = { { .pin = GPIO_PIN(PORT_A, 0), .cc_chan = 0 },
73  { .pin = GPIO_PIN(PORT_A, 1), .cc_chan = 1 },
74  { .pin = GPIO_PIN(PORT_A, 2), .cc_chan = 2 },
75  { .pin = GPIO_PIN(PORT_A, 3), .cc_chan = 3 } },
76  .af = GPIO_AF_OUT_PP,
77  .bus = APB1
78  },
79  {
80  .dev = TIM3,
81  .rcc_mask = RCC_APB1ENR_TIM3EN,
82  .chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0 },
83  { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1 },
84  { .pin = GPIO_PIN(PORT_B, 0), .cc_chan = 2 },
85  { .pin = GPIO_PIN(PORT_B, 1), .cc_chan = 3 } },
86  .af = GPIO_AF_OUT_PP,
87  .bus = APB1
88  },
89  {
90  .dev = TIM4,
91  .rcc_mask = RCC_APB1ENR_TIM4EN,
92  .chan = { { .pin = GPIO_PIN(PORT_B, 6), .cc_chan = 0 },
93  { .pin = GPIO_PIN(PORT_B, 7), .cc_chan = 1 },
94  { .pin = GPIO_PIN(PORT_B, 8), .cc_chan = 2 },
95  { .pin = GPIO_PIN(PORT_B, 9), .cc_chan = 3 } },
96  .af = GPIO_AF_OUT_PP,
97  .bus = APB1
98  }
99 };
100 
101 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
108 static const timer_conf_t timer_config[] = {
109  {
110  .dev = TIM2,
111  .max = 0x0000ffff,
112  .rcc_mask = RCC_APB1ENR_TIM2EN,
113  .bus = APB1,
114  .irqn = TIM2_IRQn
115  },
116  {
117  .dev = TIM3,
118  .max = 0x0000ffff,
119  .rcc_mask = RCC_APB1ENR_TIM3EN,
120  .bus = APB1,
121  .irqn = TIM3_IRQn
122  },
123  {
124  .dev = TIM4,
125  .max = 0x0000ffff,
126  .rcc_mask = RCC_APB1ENR_TIM4EN,
127  .bus = APB1,
128  .irqn = TIM4_IRQn
129  }
130 };
131 
132 #define TIMER_0_ISR isr_tim2
133 #define TIMER_1_ISR isr_tim3
134 #define TIMER_2_ISR isr_tim4
135 
136 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
143 static const uart_conf_t uart_config[] = {
144  {
145  .dev = USART2,
146  .rcc_mask = RCC_APB1ENR_USART2EN,
147  .rx_pin = GPIO_PIN(PORT_A, 3),
148  .tx_pin = GPIO_PIN(PORT_A, 2),
149  .bus = APB1,
150  .irqn = USART2_IRQn
151  },
152  {
153  .dev = USART1,
154  .rcc_mask = RCC_APB2ENR_USART1EN,
155  .rx_pin = GPIO_PIN(PORT_A, 10),
156  .tx_pin = GPIO_PIN(PORT_A, 9),
157  .bus = APB2,
158  .irqn = USART1_IRQn
159  },
160  {
161  .dev = USART3,
162  .rcc_mask = RCC_APB1ENR_USART3EN,
163  .rx_pin = GPIO_PIN(PORT_B, 11),
164  .tx_pin = GPIO_PIN(PORT_B, 10),
165  .bus = APB1,
166  .irqn = USART3_IRQn
167  }
168 };
169 
170 #define UART_0_ISR (isr_usart2)
171 #define UART_1_ISR (isr_usart1)
172 #define UART_2_ISR (isr_usart3)
173 
174 #define UART_NUMOF ARRAY_SIZE(uart_config)
181 #ifndef RTT_FREQUENCY
182 #define RTT_FREQUENCY (16384) /* in Hz */
183 #endif
192 static const i2c_conf_t i2c_config[] = {
193  {
194  .dev = I2C1,
195  .speed = I2C_SPEED_NORMAL,
196  .scl_pin = GPIO_PIN(PORT_B, 8),
197  .sda_pin = GPIO_PIN(PORT_B, 9),
198  .bus = APB1,
199  .rcc_mask = RCC_APB1ENR_I2C1EN,
200  .clk = CLOCK_APB1,
201  .irqn = I2C1_EV_IRQn
202  },
203  {
204  .dev = I2C2,
205  .speed = I2C_SPEED_NORMAL,
206  .scl_pin = GPIO_PIN(PORT_B, 10),
207  .sda_pin = GPIO_PIN(PORT_B, 11),
208  .bus = APB1,
209  .rcc_mask = RCC_APB1ENR_I2C2EN,
210  .clk = CLOCK_APB1,
211  .irqn = I2C2_EV_IRQn
212  }
213 };
214 
215 #define I2C_0_ISR isr_i2c1_ev
216 #define I2C_1_ISR isr_i2c2_ev
217 
218 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
225 static const spi_conf_t spi_config[] = {
226  {
227  .dev = SPI1,
228  .mosi_pin = GPIO_PIN(PORT_A, 7),
229  .miso_pin = GPIO_PIN(PORT_A, 6),
230  .sclk_pin = GPIO_PIN(PORT_A, 5),
231  .cs_pin = GPIO_UNDEF,
232  .rccmask = RCC_APB2ENR_SPI1EN,
233  .apbbus = APB2
234  },
235  {
236  .dev = SPI2,
237  .mosi_pin = GPIO_PIN(PORT_B, 15),
238  .miso_pin = GPIO_PIN(PORT_B, 14),
239  .sclk_pin = GPIO_PIN(PORT_B, 13),
240  .cs_pin = GPIO_UNDEF,
241  .rccmask = RCC_APB1ENR_SPI2EN,
242  .apbbus = APB1
243  }
244 };
245 
246 #define SPI_NUMOF ARRAY_SIZE(spi_config)
249 #ifdef __cplusplus
250 }
251 #endif
252 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:250
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
@ GPIO_AF_OUT_PP
alternate function output - push-pull
Definition: periph_cpu.h:166
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:377
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218