periph_conf.h
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1 /*
2  * Copyright (C) 2020 ML!PA Consulting GmbH
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
63 #define CLOCK_USE_PLL (1)
64 #define CLOCK_USE_XOSC32_DFLL (0)
65 /*
66  * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
67  * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
68  *
69  * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
70  * be of by a couple off % points, so prefer XOSC32K as default configuration.
71  */
72 #define GEN2_ULP32K (1)
73 
74 #if CLOCK_USE_PLL
75 /* edit these values to adjust the PLL output frequency */
76 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
77 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
78 /* generate the actual used core clock frequency */
79 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
80 #elif CLOCK_USE_XOSC32_DFLL
81 /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
82 #define CLOCK_CORECLOCK (48000000U)
83 #define CLOCK_XOSC32K (32768UL)
84 #define CLOCK_8MHZ (1)
85 #else
86 /* edit this value to your needs */
87 #define CLOCK_DIV (1U)
88 /* generate the actual core clock frequency */
89 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
90 #endif
97 static const tc32_conf_t timer_config[] = {
98  { /* Timer 0 - System Clock */
99  .dev = TC1,
100  .irq = TC1_IRQn,
101  .pm_mask = PM_APBCMASK_TC1 | PM_APBCMASK_TC2,
102  .gclk_ctrl = GCLK_CLKCTRL_ID_TC1_TC2,
103 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
104  .gclk_src = SAM0_GCLK_1MHZ,
105 #else
106  .gclk_src = SAM0_GCLK_MAIN,
107 #endif
108  .flags = TC_CTRLA_MODE_COUNT32,
109  },
110 };
111 
112 #define TIMER_0_MAX_VALUE 0xffffffff
113 
114 /* interrupt function name mapping */
115 #define TIMER_0_ISR isr_tc1
116 
117 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
124 static const uart_conf_t uart_config[] = {
125  { /* Virtual COM Port */
126  .dev = &SERCOM0->USART,
127  .rx_pin = GPIO_PIN(PA, 11),
128  .tx_pin = GPIO_PIN(PA, 10),
129 #ifdef MODULE_PERIPH_UART_HW_FC
130  .rts_pin = GPIO_UNDEF,
131  .cts_pin = GPIO_UNDEF,
132 #endif
133  .mux = GPIO_MUX_C,
134  .rx_pad = UART_PAD_RX_3,
135  .tx_pad = UART_PAD_TX_2,
136  .flags = UART_FLAG_NONE,
137  .gclk_src = SAM0_GCLK_MAIN,
138  },
139 };
140 
141 /* interrupt function name mapping */
142 #define UART_0_ISR isr_sercom0
143 
144 #define UART_NUMOF ARRAY_SIZE(uart_config)
151 #define PWM_0_EN 1
152 
153 #if PWM_0_EN
154 /* PWM0 channels */
155 static const pwm_conf_chan_t pwm_chan0_config[] = {
156  /* GPIO pin, MUX value, TCC channel */
157  { GPIO_PIN(PA, 17), GPIO_MUX_F, 7 },
158  { GPIO_PIN(PA, 22), GPIO_MUX_F, 4 },
159  { GPIO_PIN(PA, 23), GPIO_MUX_F, 5 },
160  { GPIO_PIN(PA, 24), GPIO_MUX_E, 2 },
161 };
162 #endif
163 
164 /* PWM device configuration */
165 static const pwm_conf_t pwm_config[] = {
166 #if PWM_0_EN
167  {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
168 #endif
169 };
170 
171 /* number of devices that are actually defined */
172 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
179 static const spi_conf_t spi_config[] = {
180  { /* SPI header */
181  .dev = &SERCOM1->SPI,
182  .miso_pin = GPIO_PIN(PA, 24),
183  .mosi_pin = GPIO_PIN(PA, 22),
184  .clk_pin = GPIO_PIN(PA, 9),
185  .miso_mux = GPIO_MUX_C,
186  .mosi_mux = GPIO_MUX_C,
187  .clk_mux = GPIO_MUX_C,
188  .miso_pad = SPI_PAD_MISO_2,
189  .mosi_pad = SPI_PAD_MOSI_0_SCK_3,
190  .gclk_src = SAM0_GCLK_MAIN,
191  },
192 };
193 
194 #define SPI_NUMOF ARRAY_SIZE(spi_config)
201 static const i2c_conf_t i2c_config[] = {
202  {
203  .dev = &(SERCOM2->I2CM),
204  .speed = I2C_SPEED_NORMAL,
205  .scl_pin = GPIO_PIN(PA, 15),
206  .sda_pin = GPIO_PIN(PA, 14),
207  .mux = GPIO_MUX_D,
208  .gclk_src = SAM0_GCLK_MAIN,
209  .flags = I2C_FLAG_NONE
210  }
211 };
212 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
219 #ifndef RTT_FREQUENCY
220 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
221 #endif
229 /* ADC Default values */
230 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
231 
232 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
233 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
234 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
235 
236 static const adc_conf_chan_t adc_channels[] = {
237  /* port, pin, muxpos */
238  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 },
239  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 },
240  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 },
241  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 },
242  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 },
243  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 },
244 };
245 
246 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
253 #define DAC_CLOCK SAM0_GCLK_1MHZ
254  /* use Vcc as reference voltage */
255 #define DAC_VREF DAC_CTRLB_REFSEL_AVCC
258 #ifdef __cplusplus
259 }
260 #endif
261 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:82
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
@ UART_PAD_RX_3
select pad 3
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_2
use pad 2 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_0_SCK_3
use pad 0 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:123
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition: periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition: periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM channel configuration data structure.
PWM device configuration.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218