periph_conf.h
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1 /*
2  * Copyright (C) 2014-2015 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
24 #include <stdint.h>
25 
26 #include "cpu.h"
27 #include "periph_cpu.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
65 #define CLOCK_USE_PLL (1)
66 #define CLOCK_USE_XOSC32_DFLL (0)
67 /*
68  * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
69  * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
70  *
71  * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
72  * be of by a couple off % points, so prefer XOSC32K as default configuration.
73  */
74 #define GEN2_ULP32K (0)
75 
76 #if CLOCK_USE_PLL
77 /* edit these values to adjust the PLL output frequency */
78 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
79 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
80 /* generate the actual used core clock frequency */
81 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
82 #elif CLOCK_USE_XOSC32_DFLL
83  /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
84 #define CLOCK_CORECLOCK (48000000U)
85 #define CLOCK_XOSC32K (32768UL)
86 #define CLOCK_8MHZ (1)
87 #else
88 /* edit this value to your needs */
89 #define CLOCK_DIV (1U)
90 /* generate the actual core clock frequency */
91 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
92 #endif
99 static const tc32_conf_t timer_config[] = {
100  { /* Timer 0 - System Clock */
101  .dev = TC3,
102  .irq = TC3_IRQn,
103  .pm_mask = PM_APBCMASK_TC3,
104  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
105 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
106  .gclk_src = SAM0_GCLK_1MHZ,
107 #else
108  .gclk_src = SAM0_GCLK_MAIN,
109 #endif
110  .flags = TC_CTRLA_MODE_COUNT16,
111  },
112  { /* Timer 1 */
113  .dev = TC4,
114  .irq = TC4_IRQn,
115  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
116  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
117 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
118  .gclk_src = SAM0_GCLK_1MHZ,
119 #else
120  .gclk_src = SAM0_GCLK_MAIN,
121 #endif
122  .flags = TC_CTRLA_MODE_COUNT32,
123  }
124 };
125 
126 #define TIMER_0_MAX_VALUE 0xffff
127 
128 /* interrupt function name mapping */
129 #define TIMER_0_ISR isr_tc3
130 #define TIMER_1_ISR isr_tc4
131 
132 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
139 static const uart_conf_t uart_config[] = {
140  {
141  .dev = &SERCOM0->USART,
142  .rx_pin = GPIO_PIN(PA,5),
143  .tx_pin = GPIO_PIN(PA,4),
144 #ifdef MODULE_PERIPH_UART_HW_FC
145  .rts_pin = GPIO_PIN(PA,6),
146  .cts_pin = GPIO_PIN(PA,7),
147 #endif
148  .mux = GPIO_MUX_D,
149  .rx_pad = UART_PAD_RX_1,
150 #ifdef MODULE_PERIPH_UART_HW_FC
151  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
152 #else
153  .tx_pad = UART_PAD_TX_0,
154 #endif
155  .flags = UART_FLAG_NONE,
156  .gclk_src = SAM0_GCLK_MAIN,
157  },
158  {
159  .dev = &SERCOM5->USART,
160  .rx_pin = GPIO_PIN(PA,23),
161  .tx_pin = GPIO_PIN(PA,22),
162 #ifdef MODULE_PERIPH_UART_HW_FC
163  .rts_pin = GPIO_PIN(PB,22),
164  .cts_pin = GPIO_PIN(PB,23),
165 #endif
166  .mux = GPIO_MUX_D,
167  .rx_pad = UART_PAD_RX_1,
168 #ifdef MODULE_PERIPH_UART_HW_FC
169  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
170 #else
171  .tx_pad = UART_PAD_TX_0,
172 #endif
173  .flags = UART_FLAG_NONE,
174  .gclk_src = SAM0_GCLK_MAIN,
175  }
176 };
177 
178 /* interrupt function name mapping */
179 #define UART_0_ISR isr_sercom0
180 #define UART_1_ISR isr_sercom5
181 
182 #define UART_NUMOF ARRAY_SIZE(uart_config)
189 #define PWM_0_EN 1
190 #define PWM_1_EN 1
191 
192 #if PWM_0_EN
193 /* PWM0 channels */
194 static const pwm_conf_chan_t pwm_chan0_config[] = {
195  /* GPIO pin, MUX value, TCC channel */
196  { .pin = GPIO_PIN(PA, 6), .mux = GPIO_MUX_E, .chan = 0 },
197  { .pin = GPIO_PIN(PA, 7), .mux = GPIO_MUX_E, .chan = 1 },
198 };
199 #endif
200 #if PWM_1_EN
201 /* PWM1 channels */
202 static const pwm_conf_chan_t pwm_chan1_config[] = {
203  /* GPIO pin, MUX value, TCC channel */
204  { .pin = GPIO_PIN(PA, 16), .mux = GPIO_MUX_F, .chan = 0 },
205  { .pin = GPIO_PIN(PA, 18), .mux = GPIO_MUX_F, .chan = 2 },
206  { .pin = GPIO_PIN(PA, 19), .mux = GPIO_MUX_F, .chan = 3 },
207 };
208 #endif
209 
210 /* PWM device configuration */
211 static const pwm_conf_t pwm_config[] = {
212 #if PWM_0_EN
213  {
214  .tim = TCC_CONFIG(TCC1),
215  .chan = pwm_chan0_config,
216  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
217  .gclk_src = SAM0_GCLK_MAIN,
218  },
219 #endif
220 #if PWM_1_EN
221  {
222  .tim = TCC_CONFIG(TCC0),
223  .chan = pwm_chan1_config,
224  .chan_numof = ARRAY_SIZE(pwm_chan1_config),
225  .gclk_src = SAM0_GCLK_MAIN,
226  },
227 #endif
228 };
229 
230 /* number of devices that are actually defined */
231 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
238 static const spi_conf_t spi_config[] = {
239  {
240  .dev = &SERCOM4->SPI,
241  .miso_pin = GPIO_PIN(PC, 19),
242  .mosi_pin = GPIO_PIN(PB, 30),
243  .clk_pin = GPIO_PIN(PC, 18),
244  .miso_mux = GPIO_MUX_F,
245  .mosi_mux = GPIO_MUX_F,
246  .clk_mux = GPIO_MUX_F,
247  .miso_pad = SPI_PAD_MISO_0,
248  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
249  .gclk_src = SAM0_GCLK_MAIN,
250 #ifdef MODULE_PERIPH_DMA
251  .tx_trigger = SERCOM4_DMAC_ID_TX,
252  .rx_trigger = SERCOM4_DMAC_ID_RX,
253 #endif
254  },
255  {
256  .dev = &SERCOM5->SPI,
257  .miso_pin = GPIO_PIN(PB, 2),
258  .mosi_pin = GPIO_PIN(PB, 22),
259  .clk_pin = GPIO_PIN(PB, 23),
260  .miso_mux = GPIO_MUX_D,
261  .mosi_mux = GPIO_MUX_D,
262  .clk_mux = GPIO_MUX_D,
263  .miso_pad = SPI_PAD_MISO_0,
264  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
265  .gclk_src = SAM0_GCLK_MAIN,
266 #ifdef MODULE_PERIPH_DMA
267  .tx_trigger = SERCOM5_DMAC_ID_TX,
268  .rx_trigger = SERCOM5_DMAC_ID_RX,
269 #endif
270  }
271 };
272 
273 #define SPI_NUMOF ARRAY_SIZE(spi_config)
280 static const i2c_conf_t i2c_config[] = {
281  {
282  .dev = &(SERCOM3->I2CM),
283  .speed = I2C_SPEED_NORMAL,
284  .scl_pin = GPIO_PIN(PA, 17),
285  .sda_pin = GPIO_PIN(PA, 16),
286  .mux = GPIO_MUX_D,
287  .gclk_src = SAM0_GCLK_MAIN,
288  .flags = I2C_FLAG_NONE
289  }
290 };
291 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
298 #ifndef RTT_FREQUENCY
299 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
300 #endif
301 #define RTT_MIN_OFFSET (10U)
309 /* ADC Default values */
310 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
311 
312 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
313 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
314 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
315 
316 static const adc_conf_chan_t adc_channels[] = {
317  /* port, pin, muxpos */
318  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* EXT1, pin 3 */
319  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* EXT1, pin 4 */
320 };
321 
322 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
329 static const sam0_common_usb_config_t sam_usbdev_config[] = {
330  {
331  .dm = GPIO_PIN(PA, 24),
332  .dp = GPIO_PIN(PA, 25),
333  .d_mux = GPIO_MUX_G,
334  .device = &USB->DEVICE,
335  .gclk_src = SAM0_GCLK_MAIN,
336  }
337 };
339 #ifdef __cplusplus
340 }
341 #endif
342 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:82
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PC
port C
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0_RTS_2_CTS_3
TX is pad 0, on top RTS on pad 2 and CTS on pad 3.
@ UART_PAD_TX_0
select pad 0
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM channel configuration data structure.
gpio_t pin
GPIO pin.
PWM device configuration.
tc_tcc_cfg_t tim
timer configuration
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218