periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* This board provides an HSE */
22 #ifndef CONFIG_BOARD_HAS_HSE
23 #define CONFIG_BOARD_HAS_HSE 1
24 #endif
25 
26 #include "periph_cpu.h"
27 #include "clk_conf.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
37 static const dac_conf_t dac_config[] = {
38  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 }
39 };
40 
41 #define DAC_NUMOF ARRAY_SIZE(dac_config)
48 static const timer_conf_t timer_config[] = {
49  {
50  .dev = TIM2,
51  .max = 0xffffffff,
52  .rcc_mask = RCC_APB1ENR_TIM2EN,
53  .bus = APB1,
54  .irqn = TIM2_IRQn
55  }
56 };
57 
58 #define TIMER_0_ISR isr_tim2
59 
60 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
67 static const uart_conf_t uart_config[] = {
68  {
69  .dev = USART1,
70  .rcc_mask = RCC_APB2ENR_USART1EN,
71  .rx_pin = GPIO_PIN(PORT_A, 10),
72  .tx_pin = GPIO_PIN(PORT_A, 9),
73  .rx_af = GPIO_AF7,
74  .tx_af = GPIO_AF7,
75  .bus = APB2,
76  .irqn = USART1_IRQn
77  },
78  {
79  .dev = USART2,
80  .rcc_mask = RCC_APB1ENR_USART2EN,
81  .rx_pin = GPIO_PIN(PORT_D, 6),
82  .tx_pin = GPIO_PIN(PORT_D, 5),
83  .rx_af = GPIO_AF7,
84  .tx_af = GPIO_AF7,
85  .bus = APB1,
86  .irqn = USART2_IRQn
87  },
88  {
89  .dev = USART3,
90  .rcc_mask = RCC_APB1ENR_USART3EN,
91  .rx_pin = GPIO_PIN(PORT_D, 9),
92  .tx_pin = GPIO_PIN(PORT_D, 8),
93  .rx_af = GPIO_AF7,
94  .tx_af = GPIO_AF7,
95  .bus = APB1,
96  .irqn = USART3_IRQn
97  }
98 };
99 
100 #define UART_0_ISR (isr_usart1)
101 #define UART_1_ISR (isr_usart2)
102 #define UART_2_ISR (isr_usart3)
103 
104 #define UART_NUMOF ARRAY_SIZE(uart_config)
111 static const pwm_conf_t pwm_config[] = {
112  {
113  .dev = TIM3,
114  .rcc_mask = RCC_APB1ENR_TIM3EN,
115  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
116  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
117  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
118  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
119  .af = GPIO_AF2,
120  .bus = APB1
121  },
122  {
123  .dev = TIM4,
124  .rcc_mask = RCC_APB1ENR_TIM4EN,
125  .chan = { { .pin = GPIO_PIN(PORT_D, 12), .cc_chan = 0},
126  { .pin = GPIO_PIN(PORT_D, 13), .cc_chan = 1},
127  { .pin = GPIO_PIN(PORT_D, 14), .cc_chan = 2},
128  { .pin = GPIO_PIN(PORT_D, 15), .cc_chan = 3} },
129  .af = GPIO_AF2,
130  .bus = APB1
131  }
132 };
133 
134 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
141 static const spi_conf_t spi_config[] = {
142  {
143  .dev = SPI1,
144  .mosi_pin = GPIO_PIN(PORT_A, 7),
145  .miso_pin = GPIO_PIN(PORT_A, 6),
146  .sclk_pin = GPIO_PIN(PORT_A, 5),
147  .cs_pin = SPI_CS_UNDEF,
148  .mosi_af = GPIO_AF5,
149  .miso_af = GPIO_AF5,
150  .sclk_af = GPIO_AF5,
151  .cs_af = GPIO_AF5,
152  .rccmask = RCC_APB2ENR_SPI1EN,
153  .apbbus = APB2
154  },
155  {
156  .dev = SPI3,
157  .mosi_pin = GPIO_PIN(PORT_C, 12),
158  .miso_pin = GPIO_PIN(PORT_C, 11),
159  .sclk_pin = GPIO_PIN(PORT_C, 10),
160  .cs_pin = GPIO_PIN(PORT_A, 15),
161  .mosi_af = GPIO_AF6,
162  .miso_af = GPIO_AF6,
163  .sclk_af = GPIO_AF6,
164  .cs_af = GPIO_AF6,
165  .rccmask = RCC_APB1ENR_SPI3EN,
166  .apbbus = APB1
167  }
168 };
169 
170 #define SPI_NUMOF ARRAY_SIZE(spi_config)
177 static const i2c_conf_t i2c_config[] = {
178  {
179  .dev = I2C1,
180  .speed = I2C_SPEED_NORMAL,
181  .scl_pin = GPIO_PIN(PORT_B, 6),
182  .sda_pin = GPIO_PIN(PORT_B, 7),
183  .scl_af = GPIO_AF4,
184  .sda_af = GPIO_AF4,
185  .bus = APB1,
186  .rcc_mask = RCC_APB1ENR_I2C1EN,
187  .rcc_sw_mask = RCC_CFGR3_I2C1SW,
188  .irqn = I2C1_ER_IRQn
189  },
190  {
191  .dev = I2C2,
192  .speed = I2C_SPEED_NORMAL,
193  .scl_pin = GPIO_PIN(PORT_F, 1),
194  .sda_pin = GPIO_PIN(PORT_F, 0),
195  .scl_af = GPIO_AF4,
196  .sda_af = GPIO_AF4,
197  .bus = APB1,
198  .rcc_mask = RCC_APB1ENR_I2C2EN,
199  .rcc_sw_mask = RCC_CFGR3_I2C2SW,
200  .irqn = I2C2_ER_IRQn
201  }
202 };
203 
204 #define I2C_0_ISR isr_i2c1_er
205 #define I2C_1_ISR isr_i2c2_er
206 
207 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
210 #ifdef __cplusplus
211 }
212 #endif
213 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_F
port F
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:252
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF6
use alternate function 6
Definition: cpu_gpio.h:107
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218